Instructions new in each chip
Each chip has everything the one before it has (except the DSP extensions, which are not decoded). Counts of instruction types are not given because no manual was open to count them.
| Chip | New instructions |
|---|---|
| SH-1 | The base set: mov in all its addressing modes, mova, movt, swap, xtrct; add to subv, the compares, div0s, div0u, div1, exts, extu, mac.w, muls.w, mulu.w, neg, negc; the logic set with tas.b; the shifts and rotates; bt, bf, bra, bsr, jmp, jsr, rts, rte, trapa; clrt, sett, clrmac, nop, sleep; ldc, stc, lds, sts of SR, GBR, VBR, MACH, MACL, PR. |
| SH-2 | bt/s, bf/s, braf, bsrf, dt, mul.l, mac.l, dmuls.l, dmulu.l. |
| SH-3 | shad, shld, pref, ldtlb, clrs, sets; ldc and stc of SSR, SPC and the banked registers; privileged mode and the MMU. (The SH-3E adds a single-precision FPU, and the SH3-DSP a DSP: not decoded.) |
| SH-4 | The whole floating-point line (fpu page), lds, sts of FPUL and FPSCR; ocbi, ocbp, ocbwb, movca.l; ldc and stc of DBR, stc of SGR. |
| SH-4A | fsca, fsrra, fpchg; movli.l, movco.l, movua.l; icbi, prefi, synco; brk. |
What the explorer does with an instruction the chip lacks
Decoding for the SH-2, a word 0x4010 is dt r0; decoding for the SH-1 it is "not in this ISA" (an SH-2 instruction) and is shown as a .word with the real instruction in the note.
A word that no chip defines is illegal. On an SH-4 without FPU (SH4_NOFPU in an ELF file) every word of line F is "not in this ISA". The chip is chosen by the options bar; in an ELF file the default comes
from e_flags (see the ELF page).
Byte order by machine
| Machine | Chip | Byte order |
|---|---|---|
| Sega Saturn (main and slave CPU) | SH-2 (SH7095) | big |
| Sega 32X (two) | SH-2 (SH7095) | big |
| Sega Dreamcast | SH-4 (SH7091) | little (the CPU can run big; the console does not) |
| Windows CE handhelds, Linux SH ports | SH-3, SH-4 | usually little (the chips are bi-endian) |
The byte-order option defaults to the chip's usual order: big for SH-1 and SH-2, little for SH-3 and later. If the disassembly of an SH-2 binary looks like noise, try the other order.
Not described
Known, not yet covered
- Reference and viewer: SH-2A, SH-2E, SH-3E, SH-DSP, SH3-DSP and SH4AL-DSP (see the overview).
Unknown
- Reference: the assignment of an instruction to the chip that introduced it was made from memory;
brk, the SH-3 additions and the SH-4A list were not confirmed against a manual or the GNU assembler's table.