SuperH Data Transfer Instructions

Addressing modes

Loads and stores use these forms (.b byte, .w word, .l longword; a byte or word load is sign-extended to 32 bits):

Form	Address
`@Rn`	The address in Rn.
`@Rn+`	The address in Rn, then Rn is increased by the size (loads only).
`@-Rn`	Rn is decreased by the size, then it is the address (stores only).
`@(disp,Rn)`	Rn plus the 4-bit displacement times the size. `mov.l` can use any register; `mov.b` and `mov.w` only R0 as the data register.
`@(R0,Rn)`	R0 plus Rn.
`@(disp,GBR)`	GBR plus the 8-bit displacement times the size; the data register is R0.
`@(disp,PC)`	The literal near the instruction (`mov.w` and `mov.l` only): see PC-relative addresses.

Instructions

Instruction	Encoding	Chip	What it does
`mov #imm,Rn` `mov Rm,Rn`	`1110 nnnn iiiiiiii` `0110 nnnn mmmm 0011`	SH-1	Load a sign-extended 8-bit immediate into Rn; copy Rm to Rn. `mov #imm,Rn` reaches -128 to 127: larger constants come from a `mov.l @(disp,PC),Rn` literal.
`mov.b Rm,@Rn` `mov.b @Rm,Rn` `mov.b Rm,@-Rn` `mov.b @Rm+,Rn` `mov.b R0,@(disp,Rn)` `mov.b @(disp,Rm),R0` `mov.b Rm,@(R0,Rn)` `mov.b @(R0,Rm),Rn` `mov.b R0,@(disp,GBR)` `mov.b @(disp,GBR),R0`	`0010 nnnn mmmm 0000` `0110 nnnn mmmm 0000` `0010 nnnn mmmm 0100` `0110 nnnn mmmm 0100` `1000 0000 nnnn dddd` `1000 0100 mmmm dddd` `0000 nnnn mmmm 0100` `0000 nnnn mmmm 1100` `1100 0000 dddddddd` `1100 0100 dddddddd`	SH-1	Byte stores write the low byte of the register; byte loads sign-extend into the register. With a displacement, no scaling.
`mov.w Rm,@Rn` `mov.w @Rm,Rn` `mov.w Rm,@-Rn` `mov.w @Rm+,Rn` `mov.w R0,@(disp,Rn)` `mov.w @(disp,Rm),R0` `mov.w Rm,@(R0,Rn)` `mov.w @(R0,Rm),Rn` `mov.w R0,@(disp,GBR)` `mov.w @(disp,GBR),R0` `mov.w @(disp,PC),Rn`	`0010 nnnn mmmm 0001` `0110 nnnn mmmm 0001` `0010 nnnn mmmm 0101` `0110 nnnn mmmm 0101` `1000 0001 nnnn dddd` `1000 0101 mmmm dddd` `0000 nnnn mmmm 0101` `0000 nnnn mmmm 1101` `1100 0001 dddddddd` `1100 0101 dddddddd` `1001 nnnn dddddddd`	SH-1	Word moves: the displacement is multiplied by 2; the loads sign-extend. `mov.w @(disp,PC),Rn` is the usual way to load a 16-bit constant.
`mov.l Rm,@Rn` `mov.l @Rm,Rn` `mov.l Rm,@-Rn` `mov.l @Rm+,Rn` `mov.l Rm,@(disp,Rn)` `mov.l @(disp,Rm),Rn` `mov.l Rm,@(R0,Rn)` `mov.l @(R0,Rm),Rn` `mov.l R0,@(disp,GBR)` `mov.l @(disp,GBR),R0` `mov.l @(disp,PC),Rn`	`0010 nnnn mmmm 0010` `0110 nnnn mmmm 0010` `0010 nnnn mmmm 0110` `0110 nnnn mmmm 0110` `0001 nnnn mmmm dddd` `0101 nnnn mmmm dddd` `0000 nnnn mmmm 0110` `0000 nnnn mmmm 1110` `1100 0010 dddddddd` `1100 0110 dddddddd` `1101 nnnn dddddddd`	SH-1	Longword moves: the displacement is multiplied by 4. The address must be a multiple of 4, or an address error exception is raised. `mov.l Rm,@-r15` and `mov.l @r15+,Rn` are the push and pop.
`mova @(disp,PC),R0`	`1100 0111 dddddddd`	SH-1	R0 = `((PC + 4) with the low two bits cleared) + disp * 4`: the address of a literal or of a table after the code. Not allowed in a delay slot.
`movt Rn`	`0000 nnnn 0010 1001`	SH-1	Rn = the T bit (0 or 1).
`swap.b Rm,Rn`	`0110 nnnn mmmm 1000`	SH-1	Rn = Rm with its two low bytes exchanged (the upper 16 bits are copied).
`swap.w Rm,Rn`	`0110 nnnn mmmm 1001`	SH-1	Rn = Rm with its two 16-bit halves exchanged.
`xtrct Rm,Rn`	`0010 nnnn mmmm 1101`	SH-1	Rn = the middle 32 bits of the 64-bit value Rm:Rn: the low 16 bits of Rm become the high half, the high 16 bits of Rn the low half.
`movli.l @Rm,R0`	`0000 mmmm 0110 0011`	SH-4A	Load-linked: R0 = the longword at Rm and a link is opened for `movco.l`.
`movco.l R0,@Rn`	`0000 nnnn 0111 0011`	SH-4A	Store-conditional: stores R0 at Rn only if the link is still open (nobody else stored there); T = 1 when it stored.
`movua.l @Rm,R0` `movua.l @Rm+,R0`	`0100 mmmm 1010 1001` `0100 mmmm 1110 1001`	SH-4A	Load a longword from an address that need not be a multiple of 4 into R0; the second form then adds 4 to Rm.

movca.l is a store to the cache and is on the cache page. The floating-point moves are on the floating point page; the moves to and from control registers are on system control.

Not described

Known, not yet covered

Reference and viewer: the SH-2A moves: movi20, movi20s, mov.[bwl] @(disp12,Rm),Rn, movu, movml, movmu, movrt, mov.[bwl] R0,@Rn+ and the others.
Reference and viewer: the DSP data moves (movs, movx, movy).

Unknown

Reference: cycle counts are not given (no table was sourced).