HuC6280 Opcode Map

Introduction

The map is by the opcode’s high nibble (rows) and low nibble (columns). Cells shaded blue are the HuC6280’s own instructions (24 opcodes); the cells shaded as undocumented are the 22 opcodes that have no instruction; the rest are the 65C02’s. The HuC6280 has no WAI ($CB) and no STP ($DB); the Rockwell bit instructions are in the columns 7 and F. Operand notation: zp is at $2000 + n, rel a relative branch, # an immediate, src,dst,len three 16-bit words.

The map

	x0	x1	x2	x3	x4	x5	x6	x7	x8	x9	xA	xB	xC	xD	xE	xF
0x	BRK	ORA (zp,X)	SXY	ST0 #	TSB zp	ORA zp	ASL zp	RMB0 zp	PHP	ORA #	ASL A	-	TSB abs	ORA abs	ASL abs	BBR0 zp,rel
1x	BPL rel	ORA (zp),Y	ORA (zp)	ST1 #	TRB zp	ORA zp,X	ASL zp,X	RMB1 zp	CLC	ORA abs,Y	INC A	-	TRB abs	ORA abs,X	ASL abs,X	BBR1 zp,rel
2x	JSR abs	AND (zp,X)	SAX	ST2 #	BIT zp	AND zp	ROL zp	RMB2 zp	PLP	AND #	ROL A	-	BIT abs	AND abs	ROL abs	BBR2 zp,rel
3x	BMI rel	AND (zp),Y	AND (zp)	-	BIT zp,X	AND zp,X	ROL zp,X	RMB3 zp	SEC	AND abs,Y	DEC A	-	BIT abs,X	AND abs,X	ROL abs,X	BBR3 zp,rel
4x	RTI	EOR (zp,X)	SAY	TMA #	BSR rel	EOR zp	LSR zp	RMB4 zp	PHA	EOR #	LSR A	-	JMP abs	EOR abs	LSR abs	BBR4 zp,rel
5x	BVC rel	EOR (zp),Y	EOR (zp)	TAM #	CSL	EOR zp,X	LSR zp,X	RMB5 zp	CLI	EOR abs,Y	PHY	-	-	EOR abs,X	LSR abs,X	BBR5 zp,rel
6x	RTS	ADC (zp,X)	CLA	-	STZ zp	ADC zp	ROR zp	RMB6 zp	PLA	ADC #	ROR A	-	JMP (abs)	ADC abs	ROR abs	BBR6 zp,rel
7x	BVS rel	ADC (zp),Y	ADC (zp)	TII src,dst,len	STZ zp,X	ADC zp,X	ROR zp,X	RMB7 zp	SEI	ADC abs,Y	PLY	-	JMP (abs,X)	ADC abs,X	ROR abs,X	BBR7 zp,rel
8x	BRA rel	STA (zp,X)	CLX	TST #,zp	STY zp	STA zp	STX zp	SMB0 zp	DEY	BIT #	TXA	-	STY abs	STA abs	STX abs	BBS0 zp,rel
9x	BCC rel	STA (zp),Y	STA (zp)	TST #,abs	STY zp,X	STA zp,X	STX zp,Y	SMB1 zp	TYA	STA abs,Y	TXS	-	STZ abs	STA abs,X	STZ abs,X	BBS1 zp,rel
Ax	LDY #	LDA (zp,X)	LDX #	TST #,zp,X	LDY zp	LDA zp	LDX zp	SMB2 zp	TAY	LDA #	TAX	-	LDY abs	LDA abs	LDX abs	BBS2 zp,rel
Bx	BCS rel	LDA (zp),Y	LDA (zp)	TST #,abs,X	LDY zp,X	LDA zp,X	LDX zp,Y	SMB3 zp	CLV	LDA abs,Y	TSX	-	LDY abs,X	LDA abs,X	LDX abs,Y	BBS3 zp,rel
Cx	CPY #	CMP (zp,X)	CLY	TDD src,dst,len	CPY zp	CMP zp	DEC zp	SMB4 zp	INY	CMP #	DEX	-	CPY abs	CMP abs	DEC abs	BBS4 zp,rel
Dx	BNE rel	CMP (zp),Y	CMP (zp)	TIN src,dst,len	CSH	CMP zp,X	DEC zp,X	SMB5 zp	CLD	CMP abs,Y	PHX	-	-	CMP abs,X	DEC abs,X	BBS5 zp,rel
Ex	CPX #	SBC (zp,X)	-	TIA src,dst,len	CPX zp	SBC zp	INC zp	SMB6 zp	INX	SBC #	NOP	-	CPX abs	SBC abs	INC abs	BBS6 zp,rel
Fx	BEQ rel	SBC (zp),Y	SBC (zp)	TAI src,dst,len	SET	SBC zp,X	INC zp,X	SMB7 zp	SED	SBC abs,Y	PLX	-	-	SBC abs,X	INC abs,X	BBS7 zp,rel

The undefined opcodes

Twenty-two opcodes have no instruction: $0B, $1B, $2B, $3B, $4B, $5B, $6B, $7B, $8B, $9B, $AB, $BB, $CB, $DB, $EB, $FB (the whole column xB, including the 65C02’s WAI at $CB and STP at $DB), $33, $63, $E2, and $5C, $DC, $FC.

What they do is not in any source read for this work. The one HuC6280 core read, jspce, runs each as a one-byte no-operation that clears the T flag, in 2 cycles, and so does the explorer’s decoder, with the status undocumented and no cycle count. On the 65C02 several of these opcodes are NOPs of two or three bytes ($5C, $DC, $FC, $E2 …); whether the HuC6280’s are one byte long on real chips is not confirmed.

Status	Meaning
Documented	The 234 other opcodes.
Undocumented	The 22 above.

Not described

Known, not yet covered

Reference: the 65C02’s own map is on the 6502 opcode map; the two are not shown side by side.

Unknown

Reference: what the 22 undefined opcodes do on real hardware, whether any of them is longer than one byte, and how many cycles they take.

HuC6280 Instruction Set – Opcode map