Introduction
SVE2 builds on SVE and uses the same registers and predication. The SVE page explains that model. This page covers what came after it:
- SVE2 adds widening and narrowing integer arithmetic, saturating and halving arithmetic, complex integer arithmetic, more bitwise operations, and non-temporal gather loads and scatter stores;
- SVE2.1 adds operations on 128-bit vector segments, quadword loads
and stores, and predicate-as-counter registers (
pn); - SVE2.2 adds zeroing forms of many unary instructions;
- optional extensions add AES, SHA3, SM4, bit permutation, BFloat16 arithmetic, 8-bit floating point, checked pointer arithmetic and lookup tables.
Many SVE2 names end in b or t, for bottom and top. A
widening b form reads the even-numbered elements of its sources and a
widening t form reads the odd-numbered ones. A narrowing b
form writes the even-numbered half-width elements and sets the odd-numbered ones to
zero. A narrowing t form writes the odd-numbered ones and leaves the
even-numbered ones unchanged.
A few instructions write the condition flags. match,
nmatch and the while family set N to First, Z to None and C
to !Last from the predicate result, and set V to zero. The Flags column shows them as
“NZCV from the predicate”. A dash means NZCV does not change. It says nothing about
FPSR.
The instructions
Each row shows one form as the disassembler prints it. Most instructions have other element sizes, and some have indexed, predicated or unpredicated forms as well.
Long addition and subtraction
These read half-width elements and give double-width results.
| Mnemonic | Syntax | What it does | Flags |
|---|---|---|---|
saddlb, saddlt | saddlb z0.h, z1.b, z2.b | Adds the even (b) or odd (t) signed elements of the two sources. | – |
uaddlb, uaddlt | uaddlb z0.h, z1.b, z2.b | Adds the even or odd unsigned elements of the two sources. | – |
ssublb, ssublt | ssublb z0.h, z1.b, z2.b | Subtracts the even or odd signed elements of the second source from those of the first. | – |
usublb, usublt | usublb z0.h, z1.b, z2.b | Subtracts the even or odd unsigned elements of the second source from those of the first. | – |
saddlbt | saddlbt z0.h, z1.b, z2.b | Adds the even signed elements of the first source to the odd signed elements of the second. | – |
ssublbt | ssublbt z0.h, z1.b, z2.b | Subtracts the odd signed elements of the second source from the even signed elements of the first. | – |
ssubltb | ssubltb z0.h, z1.b, z2.b | Subtracts the even signed elements of the second source from the odd signed elements of the first. | – |
saddwb, saddwt | saddwb z0.h, z1.h, z2.b | Adds the even or odd signed elements of the second source to the double-width elements of the first. | – |
uaddwb, uaddwt | uaddwb z0.h, z1.h, z2.b | Adds the even or odd unsigned elements of the second source to the double-width elements of the first. | – |
ssubwb, ssubwt | ssubwb z0.h, z1.h, z2.b | Subtracts the even or odd signed elements of the second source from the double-width elements of the first. | – |
usubwb, usubwt | usubwb z0.h, z1.h, z2.b | Subtracts the even or odd unsigned elements of the second source from the double-width elements of the first. | – |
sadalp, uadalp | sadalp z0.h, p0/m, z1.b | Adds pairs of adjacent signed or unsigned elements and adds each sum to the overlapping double-width element of the destination. | – |
Absolute difference
| Mnemonic | Syntax | What it does | Flags |
|---|---|---|---|
sabdlb, sabdlt | sabdlb z0.h, z1.b, z2.b | Absolute difference of the even or odd signed elements, as double-width results. | – |
uabdlb, uabdlt | uabdlb z0.h, z1.b, z2.b | Absolute difference of the even or odd unsigned elements, as double-width results. | – |
sabalb, sabalt | sabalb z0.h, z1.b, z2.b | Adds the absolute difference of the even or odd signed elements to the overlapping double-width element of the destination. | – |
uabalb, uabalt | uabalb z0.h, z1.b, z2.b | Adds the absolute difference of the even or odd unsigned elements to the overlapping double-width element of the destination. | – |
saba, uaba | saba z0.b, z1.b, z2.b | Adds the absolute difference of the signed or unsigned elements to the same-width element of the destination. | – |
Narrowing and carry
| Mnemonic | Syntax | What it does | Flags |
|---|---|---|---|
addhnb, addhnt | addhnb z0.b, z1.h, z2.h | Adds the elements and keeps the high half of each sum, in the even or odd half-width elements. | – |
raddhnb, raddhnt | raddhnb z0.b, z1.h, z2.h | Like addhnb and addhnt, with the high half rounded. | – |
subhnb, subhnt | subhnb z0.b, z1.h, z2.h | Subtracts the elements and keeps the high half of each difference, in the even or odd half-width elements. | – |
rsubhnb, rsubhnt | rsubhnb z0.b, z1.h, z2.h | Like subhnb and subhnt, with the high half rounded. | – |
adclb, adclt | adclb z0.s, z1.s, z2.s | Adds the even (adclb) or odd (adclt) elements of the first source, and a carry taken from bit 0 of the odd elements of the second source, to the even elements of the destination. The carry out goes in the next odd element of the destination. | – |
sbclb, sbclt | sbclb z0.s, z1.s, z2.s | Subtracts the even (sbclb) or odd (sbclt) elements of the first source, and the inverse of bit 0 of the odd elements of the second source, from the even elements of the destination. The carry out goes in the next odd element of the destination. | – |
Multiplication
| Mnemonic | Syntax | What it does | Flags |
|---|---|---|---|
mul | mul z0.b, z1.b, z2.b | Multiplies corresponding elements. Unpredicated. | – |
smulh, umulh | smulh z0.b, z1.b, z2.b | Multiplies signed or unsigned elements and keeps the high half of each product. Unpredicated. | – |
pmul | pmul z0.b, z1.b, z2.b | Polynomial multiplication over [0, 1] of corresponding elements. Unpredicated. | – |
mla, mls | mla z0.h, z1.h, z2.h[0] | Multiplies each element of the first source by the indexed element in the same 128-bit segment of the second, then adds the product to, or subtracts it from, the destination. | – |
smullb, smullt | smullb z0.s, z1.h, z2.h[0] | Multiplies the even or odd signed elements, giving double-width products. | – |
umullb, umullt | umullb z0.s, z1.h, z2.h[0] | Multiplies the even or odd unsigned elements, giving double-width products. | – |
smlalb, smlalt | smlalb z0.h, z1.b, z2.b | Multiplies the even or odd signed elements and adds the product to the double-width destination element. | – |
smlslb, smlslt | smlslb z0.h, z1.b, z2.b | Multiplies the even or odd signed elements and subtracts the product from the double-width destination element. | – |
umlalb, umlalt | umlalb z0.h, z1.b, z2.b | Multiplies the even or odd unsigned elements and adds the product to the double-width destination element. | – |
umlslb, umlslt | umlslb z0.h, z1.b, z2.b | Multiplies the even or odd unsigned elements and subtracts the product from the double-width destination element. | – |
sqdmulh | sqdmulh z0.b, z1.b, z2.b | Multiplies signed elements, doubles the product and keeps the high half, saturated. | – |
sqrdmulh | sqrdmulh z0.b, z1.b, z2.b | Like sqdmulh, with the high half rounded. | – |
sqdmullb, sqdmullt | sqdmullb z0.s, z1.h, z2.h[0] | Multiplies the even or odd signed elements and doubles the product, saturated to double width. | – |
sqdmlalb, sqdmlalt | sqdmlalb z0.h, z1.b, z2.b | Multiplies the even or odd signed elements, doubles the product and adds it to the double-width destination element, with saturation. | – |
sqdmlslb, sqdmlslt | sqdmlslb z0.h, z1.b, z2.b | Multiplies the even or odd signed elements, doubles the product and subtracts it from the double-width destination element, with saturation. | – |
sqdmlalbt | sqdmlalbt z0.h, z1.b, z2.b | Like sqdmlalb, multiplying the even signed elements of the first source by the odd signed elements of the second. | – |
sqdmlslbt | sqdmlslbt z0.h, z1.b, z2.b | Like sqdmlslb, multiplying the even signed elements of the first source by the odd signed elements of the second. | – |
sqrdmlah, sqrdmlsh | sqrdmlah z0.b, z1.b, z2.b | Multiplies signed elements, doubles the product, and adds the rounded high half to the destination element (sqrdmlah) or subtracts it (sqrdmlsh), with saturation. | – |
sdot, udot | sdot z0.s, z1.h, z2.h | Two-way dot product of a pair of signed or unsigned values in each element of the sources. Adds the widened sum to the destination element. | – |
Saturating and halving arithmetic
| Mnemonic | Syntax | What it does | Flags |
|---|---|---|---|
sqabs, sqneg | sqabs z0.b, p0/m, z1.b | Saturating absolute value or negation of each active signed element. | – |
sqadd, uqadd | sqadd z0.b, p0/m, z0.b, z1.b | Saturating signed or unsigned addition of active elements. | – |
sqsub, uqsub | sqsub z0.b, p0/m, z0.b, z1.b | Saturating signed or unsigned subtraction of the second source from the first. | – |
sqsubr, uqsubr | sqsubr z0.b, p0/m, z0.b, z1.b | The same with the sources swapped: subtracts the first source from the second. | – |
suqadd | suqadd z0.b, p0/m, z0.b, z1.b | Adds active unsigned elements of the source to signed elements of the destination, saturating to the signed range. | – |
usqadd | usqadd z0.b, p0/m, z0.b, z1.b | Adds active signed elements of the source to unsigned elements of the destination, saturating to the unsigned range. | – |
shadd, uhadd | shadd z0.b, p0/m, z0.b, z1.b | Adds signed or unsigned active elements and shifts the result right one bit. | – |
srhadd, urhadd | srhadd z0.b, p0/m, z0.b, z1.b | Adds signed or unsigned active elements and shifts the result right one bit, rounding. | – |
shsub, uhsub | shsub z0.b, p0/m, z0.b, z1.b | Subtracts the second source from the first, signed or unsigned, and shifts the result right one bit. | – |
shsubr, uhsubr | shsubr z0.b, p0/m, z0.b, z1.b | The same with the sources swapped: subtracts the first source from the second. | – |
srshl, urshl | srshl z0.b, p0/m, z0.b, z1.b | Shifts signed or unsigned elements of the first source by the amounts in the second. A positive amount shifts left and a negative one shifts right. The result is rounded. | – |
srshlr, urshlr | srshlr z0.b, p0/m, z0.b, z1.b | The same with the sources swapped: shifts the second source by the amounts in the first. | – |
sqshl, uqshl | sqshl z0.b, p0/m, z0.b, z1.b | Shifts signed or unsigned elements by the amounts in the second source, with saturation. | – |
sqshlr, uqshlr | sqshlr z0.b, p0/m, z0.b, z1.b | The same with the sources swapped. | – |
sqrshl, uqrshl | sqrshl z0.b, p0/m, z0.b, z1.b | Shifts signed or unsigned elements by the amounts in the second source, with rounding and saturation. | – |
sqrshlr, uqrshlr | sqrshlr z0.b, p0/m, z0.b, z1.b | The same with the sources swapped. | – |
sclamp, uclamp | sclamp z0.b, z1.b, z2.b | Clamps each signed or unsigned destination element between the minimum in the first source and the maximum in the second. | – |
urecpe, ursqrte | urecpe z0.s, p0/m, z1.s | Approximate reciprocal, or approximate reciprocal square root, of each active unsigned element. | – |
Shifts by an immediate
| Mnemonic | Syntax | What it does | Flags |
|---|---|---|---|
srshr, urshr | srshr z0.h, p0/m, z0.h, #0x1 | Shifts active signed or unsigned elements right by an immediate, rounding the result. | – |
sqshlu | sqshlu z0.h, p0/m, z0.h, #0xf | Shifts active signed elements left by an immediate and saturates to the unsigned range. | – |
ssra, usra | ssra z0.b, z1.b, #0x8 | Shifts signed or unsigned source elements right by an immediate and adds the result to the destination element. | – |
srsra, ursra | srsra z0.b, z1.b, #0x8 | Like ssra and usra, with the shifted value rounded. | – |
sli | sli z0.b, z1.b, #0x0 | Shifts each source element left by an immediate and inserts it into the destination element. Destination bits below the inserted value stay unchanged. | – |
sri | sri z0.b, z1.b, #0x8 | Shifts each source element right by an immediate and inserts it into the destination element. Destination bits above the inserted value stay unchanged. | – |
sshllb, sshllt | sshllb z0.h, z1.b, #0x0 | Shifts the even or odd signed elements left by an immediate, giving double-width results. | – |
ushllb, ushllt | ushllb z0.h, z1.b, #0x0 | Shifts the even or odd unsigned elements left by an immediate, giving double-width results. | – |
Narrowing shifts and extracts
These narrow each element to half width. The b form writes the
even-numbered half-width elements and the t form writes the odd-numbered
ones.
| Mnemonic | Syntax | What it does | Flags |
|---|---|---|---|
shrnb, shrnt | shrnb z0.b, z1.h, #0x8 | Shifts right by an immediate and keeps the low half of each result. | – |
rshrnb, rshrnt | rshrnb z0.b, z1.h, #0x8 | Like shrnb and shrnt, with the shifted value rounded. | – |
sqshrnb, sqshrnt | sqshrnb z0.b, z1.h, #0x8 | Shifts signed elements right by an immediate and saturates to the signed half-width range. | – |
sqrshrnb, sqrshrnt | sqrshrnb z0.b, z1.h, #0x8 | Like sqshrnb and sqshrnt, with the shifted value rounded. | – |
uqshrnb, uqshrnt | uqshrnb z0.b, z1.h, #0x8 | Shifts unsigned elements right by an immediate and saturates to the unsigned half-width range. | – |
uqrshrnb, uqrshrnt | uqrshrnb z0.b, z1.h, #0x8 | Like uqshrnb and uqshrnt, with the shifted value rounded. | – |
sqshrunb, sqshrunt | sqshrunb z0.b, z1.h, #0x8 | Shifts signed elements right by an immediate and saturates to the unsigned half-width range. | – |
sqrshrunb, sqrshrunt | sqrshrunb z0.b, z1.h, #0x8 | Like sqshrunb and sqshrunt, with the shifted value rounded. | – |
sqxtnb, sqxtnt | sqxtnb z0.b, z1.h | Saturates signed elements to the signed half-width range. | – |
uqxtnb, uqxtnt | uqxtnb z0.b, z1.h | Saturates unsigned elements to the unsigned half-width range. | – |
sqxtunb, sqxtunt | sqxtunb z0.b, z1.h | Saturates signed elements to the unsigned half-width range. | – |
Multi-vector narrowing
These read two source vectors, narrow each element to half width, and interleave the results. They are unpredicated.
| Mnemonic | Syntax | What it does | Flags |
|---|---|---|---|
sqcvtn, uqcvtn | sqcvtn z0.h, { z2.s, z3.s } | Saturates signed or unsigned elements to half width. | – |
sqcvtun | sqcvtun z0.h, { z2.s, z3.s } | Saturates signed elements to the unsigned half-width range. | – |
sqrshrn, uqrshrn | sqrshrn z0.h, { z2.s, z3.s }, #0x10 | Shifts signed or unsigned elements right by an immediate, rounds, and saturates to half width. | – |
sqrshrun | sqrshrun z0.h, { z2.s, z3.s }, #0x10 | Shifts signed elements right by an immediate, rounds, and saturates to the unsigned half-width range. | – |
Pairwise and segment reductions
The pairwise instructions work on adjacent pairs within each source and interleave
the results. The qv instructions combine the elements at the same
position in each 128-bit segment, and give one 128-bit result in a SIMD&FP
register.
| Mnemonic | Syntax | What it does | Flags |
|---|---|---|---|
addp | addp z0.b, p0/m, z0.b, z1.b | Adds adjacent pairs. | – |
smaxp, umaxp | smaxp z0.b, p0/m, z0.b, z1.b | Signed or unsigned maximum of adjacent pairs. | – |
sminp, uminp | sminp z0.b, p0/m, z0.b, z1.b | Signed or unsigned minimum of adjacent pairs. | – |
faddp | faddp z0.h, p0/m, z0.h, z1.h | Adds adjacent floating-point pairs. | – |
fmaxp, fmaxnmp | fmaxp z0.h, p0/m, z0.h, z1.h | Floating-point maximum, or maximum number, of adjacent pairs. | – |
fminp, fminnmp | fminp z0.h, p0/m, z0.h, z1.h | Floating-point minimum, or minimum number, of adjacent pairs. | – |
addqv | addqv v0.16b, p0, z1.b | Adds the elements at each position across the segments. Inactive elements count as zero. | – |
andqv, orqv, eorqv | andqv v0.16b, p0, z1.b | Bitwise AND, OR or exclusive OR of the elements at each position across the segments. | – |
smaxqv, umaxqv | smaxqv v0.16b, p0, z1.b | Signed or unsigned maximum of the elements at each position across the segments. | – |
sminqv, uminqv | sminqv v0.16b, p0, z1.b | Signed or unsigned minimum of the elements at each position across the segments. | – |
faddqv | faddqv v0.8h, p0, z1.h | Floating-point addition of the elements at each position across the segments, by recursive pairwise reduction. Inactive elements count as +0.0. | – |
fmaxqv, fmaxnmqv | fmaxqv v0.8h, p0, z1.h | Floating-point maximum, or maximum number, of the elements at each position across the segments. | – |
fminqv, fminnmqv | fminqv v0.8h, p0, z1.h | Floating-point minimum, or minimum number, of the elements at each position across the segments. | – |
Complex integer arithmetic
A complex number is an even and odd pair of elements: the real part in the even element and the imaginary part in the odd one.
| Mnemonic | Syntax | What it does | Flags |
|---|---|---|---|
cadd | cadd z0.b, z0.b, z1.b, #90 | Adds the complex numbers of the first source to those of the second, after rotating the second by 90 or 270 degrees. | – |
sqcadd | sqcadd z0.b, z0.b, z1.b, #90 | Like cadd, with each result saturated to the signed range. | – |
cmla | cmla z0.b, z1.b, z2.b, #0 | Complex multiply-add with a rotation of 0, 90, 180 or 270 degrees. Two of these with rotations 90 degrees apart make a full complex multiply-add or multiply-subtract. | – |
sqrdcmlah | sqrdcmlah z0.b, z1.b, z2.b, #0 | Like cmla, but doubles the products, keeps the rounded high half of each result, and saturates. | – |
cdot | cdot z0.s, z1.b, z2.b, #0 | Multiplies pairs of 8-bit or 16-bit complex numbers, with a rotation of the second source, and adds the wide real or wide imaginary parts of the products to a 32-bit or 64-bit destination element. | – |
Bitwise operations
| Mnemonic | Syntax | What it does | Flags |
|---|---|---|---|
bsl | bsl z0.d, z0.d, z1.d, z2.d | Selects bits from the first source where the third source has a 1, and from the second source where it has a 0. | – |
bsl1n | bsl1n z0.d, z0.d, z1.d, z2.d | Like bsl, with the first source inverted. | – |
bsl2n | bsl2n z0.d, z0.d, z1.d, z2.d | Like bsl, with the second source inverted. | – |
nbsl | nbsl z0.d, z0.d, z1.d, z2.d | Like bsl, with the result inverted. | – |
bcax | bcax z0.d, z0.d, z1.d, z2.d | ANDs the second source with the inverse of the third, then exclusive-ORs the result with the first. | – |
eor3 | eor3 z0.d, z0.d, z1.d, z2.d | Exclusive OR of three vectors. | – |
eorbt | eorbt z0.b, z1.b, z2.b | Exclusive-ORs the even elements of the first source with the odd elements of the second, into the even elements of the destination. The odd elements stay unchanged. | – |
eortb | eortb z0.b, z1.b, z2.b | Exclusive-ORs the odd elements of the first source with the even elements of the second, into the odd elements of the destination. The even elements stay unchanged. | – |
xar | xar z0.b, z0.b, z1.b, #0x8 | Exclusive-ORs the two sources, then rotates each element of the result right by an immediate. | – |
Bit permutation
Bit permutation is an optional extension. Each element of the second source is a mask for the same element of the first.
| Mnemonic | Syntax | What it does | Flags |
|---|---|---|---|
bdep | bdep z0.b, z1.b, z2.b | Scatters the lowest-numbered bits of each element to the positions where the mask has a 1, keeping their order. Other bits become zero. | – |
bext | bext z0.b, z1.b, z2.b | Gathers the bits at the positions where the mask has a 1 into the lowest-numbered bits, keeping their order. Other bits become zero. | – |
bgrp | bgrp z0.b, z1.b, z2.b | Moves the bits where the mask has a 1 to the low end and the bits where it has a 0 to the high end, keeping the order within each group. | – |
Matching and histograms
| Mnemonic | Syntax | What it does | Flags |
|---|---|---|---|
match | match p0.b, p0/z, z1.b, z2.b | Sets a predicate element true where an active 8-bit or 16-bit element of the first source equals any element in the same 128-bit segment of the second. | NZCV from the predicate |
nmatch | nmatch p0.b, p0/z, z1.b, z2.b | Sets a predicate element true where an active element of the first source equals no element in the same 128-bit segment of the second. | NZCV from the predicate |
histcnt | histcnt z0.d, p0/z, z1.d, z2.d | For each active 32-bit or 64-bit element of the first source, counts the active elements of the second source with the same value and an element number no higher than its own. | – |
histseg | histseg z0.b, z1.b, z2.b | For each byte of the first source, counts the elements with the same value in the same 128-bit segment of the second. | – |
Cryptography
AES, SHA3 and SM4 are optional extensions. The AES and SM4 instructions work on
each 128-bit segment. aesemc, aesdimc, pmull and
pmlal are the multi-vector forms.
| Mnemonic | Syntax | What it does | Flags |
|---|---|---|---|
aese | aese z0.b, z0.b, z1.b | One AES encryption round: AddRoundKey, ShiftRows and SubBytes. | – |
aesd | aesd z0.b, z0.b, z1.b | One AES decryption round: AddRoundKey, InvShiftRows and InvSubBytes. | – |
aesmc | aesmc z0.b, z0.b | AES MixColumns on each state array. | – |
aesimc | aesimc z0.b, z0.b | AES InvMixColumns on each state array. | – |
aesemc | aesemc { z0.b, z1.b }, { z0.b, z1.b }, z2.q[0] | One AES encryption round with MixColumns on each segment of two or four vectors. The round key is an indexed segment of the last operand. | – |
aesdimc | aesdimc { z0.b, z1.b }, { z0.b, z1.b }, z2.q[0] | One AES decryption round with InvMixColumns on each segment of two or four vectors. The round key is an indexed segment of the last operand. | – |
pmullb, pmullt | pmullb z0.q, z1.d, z2.d | Polynomial multiplication over [0, 1] of the even or odd elements of the sources, giving double-width results. | – |
pmull | pmull { z0.q, z1.q }, z2.d, z3.d | Polynomial multiplication of the even elements into the first destination and the odd elements into the second. | – |
pmlal | pmlal { z0.q, z1.q }, z2.d, z3.d | Like pmull, but exclusive-ORs each product with the destination element. | – |
rax1 | rax1 z0.d, z1.d, z2.d | Rotates each 64-bit element of the second source left by 1 and exclusive-ORs it with the first. | – |
sm4e | sm4e z0.s, z0.s, z1.s | Four SM4 rounds on each 128-bit segment, using round keys from the second source. | – |
sm4ekey | sm4ekey z0.s, z1.s, z2.s | Derives four rounds of SM4 keys from the input keys in the first source and the constants in the second. | – |
Moving elements
| Mnemonic | Syntax | What it does | Flags |
|---|---|---|---|
ext | ext z0.b, { z1.b, z2.b }, #0x0 | Copies bytes from the indexed byte to the end of the first source, then fills the rest from the start of the second. An index past the end of the vector counts as zero. | – |
splice | splice z0.b, p0, { z1.b, z2.b } | Copies the region of the first source between the first and last true predicate elements to the bottom of the result, then fills the rest from the bottom of the second. | – |
tbl | tbl z0.b, { z1.b, z2.b }, z3.b | Table lookup in one or two vectors. An index past the end of the table gives zero. | – |
tbx | tbx z0.b, z1.b, z2.b | Table lookup in one vector. An index past the end of the table leaves the destination element unchanged. | – |
compact | compact z0.b, p0, z1.b | Copies the active elements to consecutive elements of the destination, in order, and sets the rest to zero. | – |
expand | expand z0.b, p0, z1.b | Copies consecutive elements of the source to the active elements of the destination, in order. Inactive elements become zero. | – |
dupq | dupq z0.b, z1.b[0] | Copies the indexed element to every element of the same 128-bit segment. | – |
extq | extq z0.b, z0.b, z1.b, #0x0 | Does the job of ext within each pair of 128-bit segments. | – |
tblq | tblq z0.b, { z1.b }, z2.b | Table lookup within each 128-bit segment. An index past the end of the segment gives zero. | – |
tbxq | tbxq z0.b, z1.b, z2.b | Table lookup within each 128-bit segment. An index past the end of the segment leaves the destination element unchanged. | – |
uzpq1, uzpq2 | uzpq1 z0.b, z1.b, z2.b | Concatenates the even (uzpq1) or odd (uzpq2) elements of each pair of 128-bit segments. | – |
zipq1, zipq2 | zipq1 z0.b, z1.b, z2.b | Interleaves elements from the low (zipq1) or high (zipq2) halves of each pair of 128-bit segments. | – |
luti2 | luti2 z0.b, { z1.b }, z2[0] | Copies 8-bit or 16-bit elements from the low 128 bits of the table vector, using packed 2-bit indices from a segment of the index vector. | – |
luti4 | luti4 z0.b, { z1.b }, z2[0] | Copies 8-bit or 16-bit elements from the table, using packed 4-bit indices from a segment of the index vector. The table is the low 128 or 256 bits of one vector, or the low 128 bits of two. | – |
revd | revd z0.q, p0/m, z1.q | Reverses the two 64-bit doublewords in each active 128-bit element. | – |
Predicates and counters
A predicate-as-counter register (pn) describes predicates for a group
of two or four vectors. The while instructions build a predicate from
two scalars. They also have pair forms that write two predicate registers.
| Mnemonic | Syntax | What it does | Flags |
|---|---|---|---|
ptrue | ptrue pn8.b | Sets a predicate-as-counter register to all active. | – |
cntp | cntp x0, pn0.b, vlx2 | Counts the true elements of a predicate-as-counter register, up to the elements in two or four vectors, into a general-purpose register. | – |
pext | pext p0.b, pn8[0] | Expands a predicate-as-counter register to a mask and copies out the portion selected by the index. A pair form copies two portions. | – |
pmov | pmov p0.b, z1 | Copies a portion of a vector register to a predicate register. With the operands the other way round, it copies a predicate register to a portion of a vector register. | – |
psel | psel p0, p1, p2.b[w12, 0] | Tests the element of the second predicate selected by a W register plus an immediate. If it is true, copies the first predicate to the destination. If not, the destination is all false. | – |
firstp | firstp x0, p0, p1.b | Writes the index of the first active and true element to a general-purpose register, or −1 if there is none. | – |
lastp | lastp x0, p0, p1.b | Writes the index of the last active and true element to a general-purpose register, or −1 if there is none. | – |
whilelt | whilelt pn8.b, x0, x1, vlx2 | True from the lowest element while the incrementing first operand is less than the second, signed. | NZCV from the predicate |
whilele | whilele pn8.b, x0, x1, vlx2 | True from the lowest element while the incrementing first operand is less than or equal to the second, signed. | NZCV from the predicate |
whilelo | whilelo pn8.b, x0, x1, vlx2 | True from the lowest element while the incrementing first operand is lower than the second, unsigned. | NZCV from the predicate |
whilels | whilels pn8.b, x0, x1, vlx2 | True from the lowest element while the incrementing first operand is lower than or the same as the second, unsigned. | NZCV from the predicate |
whilege | whilege p0.b, w0, w1 | True from the highest element while the decrementing first operand is greater than or equal to the second, signed. | NZCV from the predicate |
whilegt | whilegt p0.b, w0, w1 | True from the highest element while the decrementing first operand is greater than the second, signed. | NZCV from the predicate |
whilehi | whilehi p0.b, w0, w1 | True from the highest element while the decrementing first operand is higher than the second, unsigned. | NZCV from the predicate |
whilehs | whilehs p0.b, w0, w1 | True from the highest element while the decrementing first operand is higher than or the same as the second, unsigned. | NZCV from the predicate |
whilerw | whilerw p0.b, x0, x1 | True while two addresses cannot have a read-after-write conflict within one iteration of a loop. | NZCV from the predicate |
whilewr | whilewr p0.b, x0, x1 | True while two addresses cannot have a write-after-read or write-after-write conflict within one iteration of a loop. | NZCV from the predicate |
Streaming vector length
These use the Streaming SVE vector length. They do not need the processor to be in Streaming SVE mode.
| Mnemonic | Syntax | What it does | Flags |
|---|---|---|---|
addsvl | addsvl x0, x1, #0x0 | Adds the Streaming SVE vector size in bytes, times an immediate from −32 to 31, to a general-purpose register or the stack pointer. | – |
addspl | addspl x0, x1, #0x0 | Adds the Streaming SVE predicate size in bytes, times an immediate from −32 to 31, to a general-purpose register or the stack pointer. | – |
rdsvl | rdsvl x0, #0x0 | Writes the Streaming SVE vector size in bytes, times an immediate from −32 to 31, to a general-purpose register. | – |
Checked pointer arithmetic
Checked pointer arithmetic is an optional extension. These work on 64-bit elements. Arm calls the extra step a pointer check. They are illegal in Streaming SVE mode unless FEAT_SME_FA64 is implemented and enabled.
| Mnemonic | Syntax | What it does | Flags |
|---|---|---|---|
addpt | addpt z0.d, p0/m, z0.d, z1.d | Adds elements with a pointer check. | – |
subpt | subpt z0.d, p0/m, z0.d, z1.d | Subtracts the second source from the first with a pointer check. | – |
madpt | madpt z0.d, z1.d, z2.d | Multiplies the first two operands with an overflow check and adds the third with a pointer check. The result replaces the multiplicand. | – |
mlapt | mlapt z0.d, z1.d, z2.d | Multiplies the two sources with an overflow check and adds the product to the addend with a pointer check. The result replaces the addend. | – |
Loads and stores
A load sets inactive elements to zero in the destination, and they do not cause a read from Device memory or a fault. A store does not write them to memory.
| Mnemonic | Syntax | What it does | Flags |
|---|---|---|---|
ld1w, ld1d | ld1w { z0.q }, p0/z, [x0] | Contiguous load of unsigned words or doublewords to 128-bit elements. | – |
st1w, st1d | st1w { z0.q }, p0, [x0] | Contiguous store of words or doublewords from 128-bit elements. | – |
ld1q | ld1q { z0.q }, p0/z, [z1.d, x0] | Gather load of quadwords from a vector base plus a 64-bit scalar offset. | – |
st1q | st1q { z0.q }, p0, [z1.d, x0] | Scatter store of quadwords to a vector base plus a 64-bit scalar offset. | – |
ld2q, ld3q, ld4q | ld2q { z0.q, z1.q }, p0/z, [x0] | Contiguous load of two-, three- or four-quadword structures to two, three or four vectors. | – |
st2q, st3q, st4q | st2q { z0.q, z1.q }, p0, [x0] | Contiguous store of two-, three- or four-quadword structures from two, three or four vectors. | – |
ldnt1b, ldnt1h, ldnt1w, ldnt1d | ldnt1b { z0.s }, p0/z, [z1.s, x0] | Non-temporal gather load of unsigned bytes, halfwords, words or doublewords from a vector base plus a 64-bit scalar offset. Non-temporal is a hint that the data is unlikely to be used again soon. | – |
ldnt1sb, ldnt1sh, ldnt1sw | ldnt1sb { z0.s }, p0/z, [z1.s, x0] | Non-temporal gather load of signed bytes, halfwords or words. | – |
stnt1b, stnt1h, stnt1w, stnt1d | stnt1b { z0.s }, p0, [z1.s, x0] | Non-temporal scatter store of bytes, halfwords, words or doublewords to a vector base plus a 64-bit scalar offset. | – |
Floating-point conversions
| Mnemonic | Syntax | What it does | Flags |
|---|---|---|---|
fcvtlt | fcvtlt z0.s, p0/m, z1.h | Converts odd-numbered elements to the next higher precision, in the overlapping double-width elements. | – |
fcvtnt | fcvtnt z0.h, p0/m, z1.s | Converts active elements to the next lower precision, in the odd-numbered half-width elements. The even-numbered ones stay unchanged. A separate form converts a pair of single-precision vectors to 8-bit floating point, in the odd-numbered bytes. | – |
fcvtxnt | fcvtxnt z0.s, p0/m, z1.d | Converts active double-precision elements to single precision, rounding to odd, in the odd-numbered 32-bit elements. The even-numbered ones stay unchanged. | – |
bfcvtnt | bfcvtnt z0.h, p0/m, z1.s | Converts active single-precision elements to BFloat16, in the odd-numbered 16-bit elements. The even-numbered ones stay unchanged. | – |
BFloat16 arithmetic and other floating point
| Mnemonic | Syntax | What it does | Flags |
|---|---|---|---|
bfadd, bfsub, bfmul | bfadd z0.h, z1.h, z2.h | BFloat16 addition, subtraction or multiplication. | – |
bfmla, bfmls | bfmla z0.h, p0/m, z1.h, z2.h | BFloat16 fused multiply-add or multiply-subtract into the addend vector, without intermediate rounding. | – |
bfmax, bfmin | bfmax z0.h, p0/m, z0.h, z1.h | BFloat16 maximum or minimum of active elements. | – |
bfmaxnm, bfminnm | bfmaxnm z0.h, p0/m, z0.h, z1.h | BFloat16 maximum number or minimum number of active elements. | – |
bfscale | bfscale z0.h, p0/m, z0.h, z1.h | Multiplies active BFloat16 elements by 2.0 to the power of the signed integers in the second source. | – |
bfclamp | bfclamp z0.h, z1.h, z2.h | Clamps each BFloat16 destination element between the minimum in the first source and the maximum in the second. | – |
fclamp | fclamp z0.h, z1.h, z2.h | Clamps each floating-point destination element between the minimum in the first source and the maximum in the second. | – |
famax, famin | famax z0.h, p0/m, z0.h, z1.h | Maximum or minimum of the absolute values of active floating-point elements. | – |
fmlslb, fmlslt | fmlslb z0.s, z1.h, z2.h | Widens the even or odd half-precision elements to single precision and subtracts their product from the overlapping single-precision destination element, without intermediate rounding. | – |
8-bit floating point
The FPMR register selects the 8-bit encoding and the scale for these. They are
unpredicated. Where a name has 1 or 2 in it, the
1 form uses FPMR.F8S1 and FPMR.LSCALE, and the 2 form uses
FPMR.F8S2 and FPMR.LSCALE2.
| Mnemonic | Syntax | What it does | Flags |
|---|---|---|---|
bf1cvt, bf2cvt | bf1cvt z0.h, z1.b | Converts the even-numbered 8-bit elements to BFloat16, downscaling, in the overlapping 16-bit elements. | – |
bf1cvtlt, bf2cvtlt | bf1cvtlt z0.h, z1.b | Converts the odd-numbered 8-bit elements to BFloat16, downscaling, in the overlapping 16-bit elements. | – |
f1cvt, f2cvt | f1cvt z0.h, z1.b | Converts the even-numbered 8-bit elements to half precision, downscaling, in the overlapping 16-bit elements. | – |
f1cvtlt, f2cvtlt | f1cvtlt z0.h, z1.b | Converts the odd-numbered 8-bit elements to half precision, downscaling, in the overlapping 16-bit elements. | – |
bfcvtn | bfcvtn z0.b, { z2.h, z3.h } | Converts a pair of BFloat16 vectors to 8-bit floating point, scaled, and interleaves the results. | – |
fcvtn | fcvtn z0.b, { z2.h, z3.h } | Converts a pair of half-precision vectors to 8-bit floating point, scaled, and interleaves the results. | – |
fcvtnb | fcvtnb z0.b, { z2.s, z3.s } | Converts a pair of single-precision vectors to 8-bit floating point, in the even-numbered bytes. The odd-numbered ones become zero. | – |
fdot | fdot z0.h, z1.b, z2.b[0] | Sum of products of the 8-bit values in each element of the sources, scaled and added to the destination element without intermediate rounding. The destination is half or single precision. | – |
fmlalb, fmlalt | fmlalb z0.h, z1.b, z2.b | Widens the even or odd 8-bit elements to half precision and adds their scaled product to the destination element. | – |
fmlallbb, fmlallbt, fmlalltb, fmlalltt | fmlallbb z0.s, z1.b, z2.b | Widens the first, second, third or fourth 8-bit element of each 32-bit group to single precision and adds their scaled product to the destination element. | – |
fmmla | fmmla z0.s, z1.b, z2.b | Matrix multiply-accumulate. Multiplies the 2×8 matrix of 8-bit values in each 128-bit segment of the first source by the 8×2 matrix in the second, and adds the scaled result to the 2×2 single-precision matrix in the destination. | – |
Rounding to 32-bit and 64-bit integers
| Mnemonic | Syntax | What it does | Flags |
|---|---|---|---|
frint32x, frint64x | frint32x z0.s, p0/z, z1.s | Rounds each active element to an integral value that fits in 32 or 64 bits, using the rounding mode in FPCR. | – |
frint32z, frint64z | frint32z z0.s, p0/z, z1.s | Rounds each active element toward zero to an integral value that fits in 32 or 64 bits. | – |
Zeroing forms of unary instructions
SVE2.2 adds these forms, written p0/z. Inactive destination elements
become zero. The same mnemonics also have merging forms.
| Mnemonic | Syntax | What it does | Flags |
|---|---|---|---|
abs | abs z0.b, p0/z, z1.b | Absolute value of each active signed element. The most negative value stays as it is. | – |
neg | neg z0.b, p0/z, z1.b | Negates each active signed element. | – |
not | not z0.b, p0/z, z1.b | Bitwise inverse of each active element. | – |
cnot | cnot z0.b, p0/z, z1.b | Logical inverse: a nonzero element gives 0 and a zero element gives 1. | – |
cnt | cnt z0.b, p0/z, z1.b | Counts the set bits in each active element. | – |
clz | clz z0.b, p0/z, z1.b | Counts the leading zero bits in each active element. | – |
cls | cls z0.b, p0/z, z1.b | Counts the leading sign bits in each active element. | – |
rbit | rbit z0.b, p0/z, z1.b | Reverses the bits in each active element. | – |
revb, revh, revw | revb z0.h, p0/z, z1.h | Reverses the bytes, halfwords or words within each active element. | – |
sxtb, sxth, sxtw | sxtb z0.h, p0/z, z1.h | Sign-extends the low byte, halfword or word of each active element. | – |
uxtb, uxth, uxtw | uxtb z0.h, p0/z, z1.h | Zero-extends the low byte, halfword or word of each active element. | – |
fabs | fabs z0.h, p0/z, z1.h | Floating-point absolute value. Clears the sign bit. | – |
fneg | fneg z0.h, p0/z, z1.h | Floating-point negation. | – |
fsqrt | fsqrt z0.h, p0/z, z1.h | Floating-point square root. | – |
frecpx | frecpx z0.h, p0/z, z1.h | Inverts the exponent and zeroes the fraction of each active floating-point element. | – |
flogb | flogb z0.h, p0/z, z1.h | The signed integer base 2 logarithm of each active floating-point element. | – |
frinta | frinta z0.h, p0/z, z1.h | Rounds to an integral value, to nearest with ties away from zero. | – |
frintn | frintn z0.h, p0/z, z1.h | Rounds to an integral value, to nearest with ties to even. | – |
frintm | frintm z0.h, p0/z, z1.h | Rounds to an integral value, toward minus infinity. | – |
frintp | frintp z0.h, p0/z, z1.h | Rounds to an integral value, toward plus infinity. | – |
frintz | frintz z0.h, p0/z, z1.h | Rounds to an integral value, toward zero. | – |
frinti | frinti z0.h, p0/z, z1.h | Rounds to an integral value in the current rounding mode. | – |
frintx | frintx z0.h, p0/z, z1.h | Rounds to an integral value in the current rounding mode, signalling inexact. | – |
fcvt | fcvt z0.h, p0/z, z1.s | Converts each active element to another floating-point size. The smaller type sits in the low bits of the larger element. | – |
fcvtx | fcvtx z0.s, p0/z, z1.d | Converts active double-precision elements to single precision, rounding to odd, in the even-numbered 32-bit elements. The odd-numbered ones become zero. | – |
bfcvt | bfcvt z0.h, p0/z, z1.s | Converts active single-precision elements to BFloat16. The results are zero-extended to fill each element. | – |
fcvtzs, fcvtzu | fcvtzs z0.h, p0/z, z1.h | Converts active floating-point elements to signed or unsigned integers, rounding toward zero. | – |
scvtf, ucvtf | scvtf z0.h, p0/z, z1.h | Converts active signed or unsigned integers to floating point. | – |
Links
Reference
- Arm A64 Instruction Set Architecture – Arm’s description of each A64 instruction
- Arm Architecture Reference Manual for A-profile – the full architecture specification