Introduction
The Scalable Vector Extension, SVE, is an optional part of AArch64, first available with Armv8.2-A. Its instructions do not fix the width of a vector. The same code runs on any vector length the processor implements.
SVE adds these registers:
- Z0 to Z31 are the vector registers. Each is as long as the vector length. The low 128 bits of Zn are the Advanced SIMD register Vn, and a write to Vn clears the bits above them.
- The vector length is a multiple of 128 bits, from 128 to 2048. The
processor determines it, and privileged software can choose a shorter length. Code
reads it at run time with
rdvlorcntb. - P0 to P15 are the predicate registers. Each has one bit for every byte of a vector. An element wider than a byte is controlled by the lowest of its bits.
- FFR, the first-fault register, has the same size as a predicate register. It records which elements a first-fault or non-fault load read.
Elements are written .b, .h, .s and
.d, for 8, 16, 32 and 64 bits. Most instructions take a governing
predicate, and an element is active when its predicate bit is 1. Most data instructions
and all loads and stores accept only P0 to P7 as the governing predicate. The qualifier
after the predicate says what happens to inactive elements:
/m, merging: the inactive elements of the destination keep their old values./z, zeroing: the inactive elements of the destination are set to 0.
Vector arithmetic is mostly destructive and merging: the destination is also the first
source. movprfx can come before such an instruction to give it a separate
source or zeroing behaviour. Loads always zero inactive elements. Stores skip them.
Reductions and some other instructions name the predicate with no qualifier.
A first-fault load (ldff1) faults normally on its first
active element. A fault on any later element is not taken. A non-fault
load (ldnf1) takes no fault on any element. In both cases the
loads clear the FFR bits for the element that could not be read and all higher
elements, and never set them. The usual sequence is setffr, the load, then
rdffr to find which elements arrived.
Some predicate instructions set the condition flags from a predicate result, with another predicate choosing which elements count:
- N is set when the first active element is true;
- Z is set when no active element is true;
- C is set when the last active element is not true;
- V is cleared.
The table says “NZCV from the predicate” for these. They are ptest,
pfirst, pnext, the integer compares, the while
instructions and the predicate instructions with a final s.
ctermeq and ctermne set only N and V, as their row explains.
The floating-point compares do not change NZCV.
Floating-point arithmetic records exceptions in FPSR, not NZCV.
The instructions
Syntax is shown as the disassembler prints it. Where a row covers several sizes or operand forms, it gives one example and names the others.
Integer arithmetic
| Mnemonic | Syntax | What it does | Flags |
|---|---|---|---|
add, sub | add z0.b, p0/m, z0.b, z0.b; also unpredicated, and with an immediate | Adds or subtracts corresponding elements. | – |
subr | subr z0.b, p0/m, z0.b, z0.b; also with an immediate | Reversed subtract: the second operand minus the first. | – |
mul | mul z0.b, p0/m, z0.b, z0.b; also with an immediate | Multiplies elements and keeps the low half of each product. | – |
smulh, umulh | smulh z0.b, p0/m, z0.b, z0.b | Multiplies signed or unsigned elements and keeps the high half of each product. | – |
sdiv, udiv | sdiv z0.d, p0/m, z0.d, z0.d; .s or .d | Signed or unsigned division. | – |
sdivr, udivr | sdivr z0.d, p0/m, z0.d, z0.d; .s or .d | Reversed division: the second operand divided by the first. | – |
mla, mls | mla z0.b, p0/m, z0.b, z0.b | Multiplies the two sources, then adds the product to the destination or subtracts it from the destination. | – |
mad, msb | mad z0.b, p0/m, z0.b, z0.b | Multiplies the destination by the first source, then adds the product to the second source, or subtracts it from the second source. The result goes in the destination. | – |
sabd, uabd | sabd z0.b, p0/m, z0.b, z0.b | Signed or unsigned absolute difference. | – |
smax, smin, umax, umin | smax z0.b, p0/m, z0.b, z0.b; also with an immediate | Signed or unsigned maximum or minimum. | – |
neg, abs | neg z0.b, p0/m, z0.b | Negates each active element, or takes its absolute value. | – |
sqadd, sqsub, uqadd, uqsub | sqadd z0.b, z0.b, z0.b; also with an immediate | Signed or unsigned saturating add or subtract. | – |
sdot, udot | sdot z0.s, z0.b, z0.b; .s from .b or .d from .h; also indexed | Dot product. Multiplies each group of four source elements by the matching group of four in the other source, and adds the four products to one destination element of four times the width. | – |
usdot, sudot | usdot z0.s, z0.b, z0.b; sudot z0.s, z0.b, z0.b[0] | Dot product of bytes of mixed sign. usdot takes the first source as unsigned and the second as signed. sudot takes the first as signed and the indexed second as unsigned. | – |
smmla, ummla, usmmla | smmla z0.s, z0.b, z0.b | In each 128-bit segment, multiplies a 2×8 matrix of bytes by an 8×2 matrix and adds the 2×2 product of 32-bit integers to the destination. Signed, unsigned, or unsigned by signed. | – |
sxtb, sxth, sxtw, uxtb, uxth, uxtw | sxtb z0.h, p0/m, z0.h | Sign-extends or zero-extends the low byte, halfword or word of each active element. | – |
adr | adr z0.d, [z0.d, z0.d, sxtw]; also .s, shifted forms | Computes a vector of addresses: each base element plus a shifted or extended offset element. | – |
Reductions
These combine the active elements into one value in a scalar SIMD register. The predicate has no qualifier.
| Mnemonic | Syntax | What it does | Flags |
|---|---|---|---|
saddv, uaddv | saddv d0, p0, z0.b | Adds the active elements, as signed or unsigned values, into a 64-bit result. | – |
smaxv, sminv, umaxv, uminv | smaxv b0, p0, z0.b | Largest or smallest active element, signed or unsigned. | – |
andv, orv, eorv | andv b0, p0, z0.b | Bitwise AND, OR or exclusive OR of the active elements. | – |
Vector length and element counts
These instructions depend on the vector length. A pattern such as all,
pow2 or vl4 names how many elements to count, and most forms
take a multiplier written mul #n.
| Mnemonic | Syntax | What it does | Flags |
|---|---|---|---|
rdvl | rdvl x0, #0x0 | Writes the vector length in bytes, times a signed immediate, to a general register. | – |
addvl, addpl | addvl x0, x0, #0x0 | Adds a signed multiple of the vector length in bytes, or of the predicate length in bytes, to a general register. | – |
cntb, cnth, cntw, cntd | cntb x0, pow2 | Writes the number of elements of that size selected by the pattern, times the multiplier, to a general register. | – |
cntp | cntp x0, p0, p0.b | Counts the true active elements of a predicate and writes the count to a general register. | – |
incb, inch, incw, incd, decb, dech, decw, decd | incb x0, pow2; inch, incw, incd and the matching dec forms also take a vector | Adds or subtracts the pattern count times the multiplier. The vector forms apply it to every element. | – |
incp, decp | incp x0, p0.b; also a vector form | Adds or subtracts the number of true elements of a predicate. | – |
sqincb, sqinch, sqincw, sqincd, sqdecb, sqdech, sqdecw, sqdecd | sqincb x0, w0, pow2; 32-bit, 64-bit, and halfword, word and doubleword vector forms | Signed saturating add or subtract of the pattern count times the multiplier. The form with two registers works in 32 bits and sign-extends the result to 64. | – |
uqincb, uqinch, uqincw, uqincd, uqdecb, uqdech, uqdecw, uqdecd | uqincb w0, pow2; 32-bit, 64-bit, and halfword, word and doubleword vector forms | Unsigned saturating add or subtract of the pattern count times the multiplier. | – |
sqincp, sqdecp, uqincp, uqdecp | sqincp x0, p0.b, w0; uqincp w0, p0.b; also 64-bit and vector forms | Signed or unsigned saturating add or subtract of the number of true elements of a predicate. | – |
Logic, shifts and bit counts
| Mnemonic | Syntax | What it does | Flags |
|---|---|---|---|
and, bic, eor, orr | and z0.b, p0/m, z0.b, z0.b; also unpredicated .d; and, eor, orr with a bitmask immediate; and on predicates as and p0.b, p0/z, p0.b, p0.b | Bitwise AND, AND with the second operand inverted, exclusive OR, and OR. The predicate forms act on the bits of predicate registers. | – |
not | not z0.b, p0/m, z0.b; also not p0.b, p0/z, p0.b | Inverts every bit of each active element. | – |
cnot | cnot z0.b, p0/m, z0.b | Sets each active element to 1 if the source element is 0, and otherwise to 0. | – |
lsl, lsr, asr | lsl z0.b, p0/m, z0.b, z0.b; also with a .d shift, and with an immediate | Logical shift left, logical shift right, and arithmetic shift right. | – |
lslr, lsrr, asrr | lslr z0.b, p0/m, z0.b, z0.b | Reversed shifts: shift the second operand by the amount in the first. | – |
asrd | asrd z0.h, p0/m, z0.h, #0x1 | Arithmetic shift right for divide. Divides each active signed element by 2 to the power of the immediate, rounding towards zero. A plain asr rounds towards minus infinity. | – |
cls, clz, cnt | cls z0.b, p0/m, z0.b | Counts leading sign bits, leading zero bits, or set bits, in each active element. | – |
rbit | rbit z0.b, p0/m, z0.b | Reverses the bits of each active element. | – |
Integer compares
A compare writes a predicate: true where the comparison holds in an active element,
false elsewhere. The disassembler prints cmple, cmplt,
cmplo and cmpls only with a .d second operand
or an immediate. The same comparison between vectors of one size is printed as the
reversed compare.
| Mnemonic | Syntax | What it does | Flags |
|---|---|---|---|
cmpeq, cmpne | cmpeq p0.b, p0/z, z0.b, z0.b; also with a .d second operand, and a signed immediate | Equal or not equal. | NZCV from the predicate |
cmpge, cmpgt, cmple, cmplt | cmpge p0.b, p0/z, z0.b, z0.b; cmple p0.b, p0/z, z0.b, z0.d; also a signed immediate | Signed comparisons: greater or equal, greater, less or equal, less. | NZCV from the predicate |
cmphs, cmphi, cmpls, cmplo | cmphs p0.b, p0/z, z0.b, z0.b; cmplo p0.b, p0/z, z0.b, z0.d; also an unsigned immediate | Unsigned comparisons: higher or same, higher, lower or same, lower. | NZCV from the predicate |
Predicate logic
These act on predicate registers, under a governing predicate with
/z. The plain forms of and, bic,
eor and orr are in the logic table above.
| Mnemonic | Syntax | What it does | Flags |
|---|---|---|---|
ands, bics, eors, orrs | ands p0.b, p0/z, p1.b, p0.b | AND, AND with the second operand inverted, exclusive OR, and OR. | NZCV from the predicate |
nand, nor, orn | nand p0.b, p0/z, p0.b, p0.b | NOT AND, NOT OR, and OR with the second operand inverted. | – |
nands, nors, orns | nands p0.b, p0/z, p0.b, p0.b | The same, setting the flags. | NZCV from the predicate |
movs | movs p0.b, p0/z, p0.b; also movs p0.b, p0.b | Copies a predicate and sets the flags. An alias of ands or orrs. | NZCV from the predicate |
nots | nots p0.b, p0/z, p0.b | Inverts the active elements of a predicate and sets the flags. An alias of eors. | NZCV from the predicate |
Predicate breaks
These find where a loop over elements must stop, as in a search for a terminator.
brka and brkb take /z or /m. The
others, and the flag-setting forms, take only /z.
| Mnemonic | Syntax | What it does | Flags |
|---|---|---|---|
brka | brka p0.b, p0/z, p0.b | Sets the active elements of the result true up to and including the first true active source element, then false. | – |
brkas | brkas p0.b, p0/z, p0.b | As brka, setting the flags. | NZCV from the predicate |
brkb | brkb p0.b, p0/z, p0.b | Sets the active elements of the result true up to but not including the first true active source element, then false. | – |
brkbs | brkbs p0.b, p0/z, p0.b | As brkb, setting the flags. | NZCV from the predicate |
brkn | brkn p0.b, p0/z, p0.b, p0.b | If the last active element of the first source is true, the result is the second source. Otherwise the result is all false. The second source is also the destination. | – |
brkns | brkns p0.b, p0/z, p0.b, p0.b | As brkn, setting the flags. | NZCV from the predicate |
brkpa, brkpb | brkpa p0.b, p0/z, p0.b, p0.b | If the last active element of the first source is false, the result is all false. Otherwise the result is true up to the first true active element of the second source, including it for brkpa and excluding it for brkpb. | – |
brkpas, brkpbs | brkpas p0.b, p0/z, p0.b, p0.b | As brkpa and brkpb, setting the flags. | NZCV from the predicate |
Making and testing predicates
| Mnemonic | Syntax | What it does | Flags |
|---|---|---|---|
ptrue | ptrue p0.b, pow2 | Sets the elements chosen by the pattern true and the others false. | – |
ptrues | ptrues p0.b, pow2 | As ptrue, setting the flags. | NZCV from the predicate |
pfalse | pfalse p0.b | Sets every element false. | – |
ptest | ptest p0, p0.b | Sets the flags from a predicate, with the first operand choosing the active elements. It writes no register. | NZCV from the predicate |
pfirst | pfirst p0.b, p0, p0.b | Sets the first active element of the destination true. The other elements keep their values. | NZCV from the predicate |
pnext | pnext p0.b, p0, p0.b | Finds the next active element after the last true element of the destination, sets it true and all others false. If the destination has no true element, it finds the first active element. | NZCV from the predicate |
whilelt, whilele | whilelt p0.b, w0, w0; X forms too | Builds a predicate from the lowest element up. Each element is true while the first register, counting up by 1 for each element, is signed less than, or less than or equal to, the second. After the first false element all are false. | NZCV from the predicate |
whilelo, whilels | whilelo p0.b, w0, w0; X forms too | The same with unsigned lower, or lower or same. | NZCV from the predicate |
ctermeq, ctermne | ctermeq w0, w0; X forms too | Compares two general registers to decide whether a loop that goes element by element should end. If the comparison holds, N is set and V is cleared. If not, N is cleared and V is set to the inverse of C. Conditions GE and LT then mean continue and stop. Z and C do not change. | N, V |
First-fault register
| Mnemonic | Syntax | What it does | Flags |
|---|---|---|---|
setffr | setffr | Sets every bit of FFR. | – |
rdffr | rdffr p0.b, p0/z; also rdffr p0.b | Copies FFR to a predicate register, optionally with a governing predicate. | – |
rdffrs | rdffrs p0.b, p0/z | Copies FFR to a predicate register under a governing predicate, and sets the flags. | NZCV from the predicate |
wrffr | wrffr p0.b | Writes a predicate register to FFR. | – |
Contiguous loads
Contiguous loads read consecutive memory. Offsets can be a register or an immediate scaled by the vector length. Many forms also accept a vector of offsets or base addresses to gather from scattered memory.
| Mnemonic | Syntax | What it does | Flags |
|---|---|---|---|
ld1b, ld1h, ld1w, ld1d | ld1b { z0.b }, p0/z, [x0]; also register, immediate and vector offsets | Loads bytes, halfwords, words or doublewords and zero-extends each into its element. | – |
ld1sb, ld1sh, ld1sw | ld1sb { z0.d }, p0/z, [x0] | Loads bytes, halfwords or words and sign-extends each into a wider element. | – |
ld2b, ld2h, ld2w, ld2d, ld3b, ld3h, ld3w, ld3d, ld4b, ld4h, ld4w, ld4d | ld2b { z0.b, z1.b }, p0/z, [x0]; ld3b { z0.b - z2.b }, p0/z, [x0] | Loads interleaved structures of two, three or four elements into that many registers, one element of each structure per register. | – |
ldnt1b, ldnt1h, ldnt1w, ldnt1d | ldnt1b { z0.b }, p0/z, [x0] | Contiguous load with a hint that the data will not be needed again soon. | – |
Loads and replicates
| Mnemonic | Syntax | What it does | Flags |
|---|---|---|---|
ld1rb, ld1rh, ld1rw, ld1rd | ld1rb { z0.b }, p0/z, [x0] | Loads one value, zero-extends it, and writes it to every active element. | – |
ld1rsb, ld1rsh, ld1rsw | ld1rsb { z0.d }, p0/z, [x0] | Loads one value, sign-extends it, and writes it to every active element. | – |
ld1rqb, ld1rqh, ld1rqw, ld1rqd | ld1rqb { z0.b }, p0/z, [x0] | Loads 128 bits of elements and repeats them through the vector. | – |
ld1rob, ld1roh, ld1row, ld1rod | ld1rob { z0.b }, p0/z, [x0] | Loads 256 bits of elements and repeats them through the vector. | – |
First-fault and non-fault loads
These change FFR, not NZCV. The Introduction describes how the faults work.
| Mnemonic | Syntax | What it does | Flags |
|---|---|---|---|
ldff1b, ldff1h, ldff1w, ldff1d | ldff1b { z0.b }, p0/z, [x0]; also with vector offsets | First-fault load, zero-extending. | – |
ldff1sb, ldff1sh, ldff1sw | ldff1sb { z0.d }, p0/z, [x0] | First-fault load, sign-extending. | – |
ldnf1b, ldnf1h, ldnf1w, ldnf1d | ldnf1b { z0.b }, p0/z, [x0] | Non-fault load, zero-extending. | – |
ldnf1sb, ldnf1sh, ldnf1sw | ldnf1sb { z0.d }, p0/z, [x0] | Non-fault load, sign-extending. | – |
Stores, register loads and prefetches
| Mnemonic | Syntax | What it does | Flags |
|---|---|---|---|
st1b, st1h, st1w, st1d | st1b { z0.b }, p0, [x0]; also register, immediate and vector offsets | Stores the active elements. The size in the mnemonic can be narrower than the element, keeping its low bits. Vector offsets scatter them. | – |
st2b, st2h, st2w, st2d, st3b, st3h, st3w, st3d, st4b, st4h, st4w, st4d | st2b { z0.b, z1.b }, p0, [x0] | Stores interleaved structures from two, three or four registers. | – |
stnt1b, stnt1h, stnt1w, stnt1d | stnt1b { z0.b }, p0, [x0] | Contiguous store with a hint that the data will not be needed again soon. | – |
ldr, str | ldr z0, [x0]; str z0, [x0]; also a p register, and an offset with mul vl | Loads or stores a whole vector or predicate register, with no predicate. The offset counts in multiples of the register’s size. | – |
prfb, prfh, prfw, prfd | prfb pldl1keep, p0, [x0, z0.s, uxtw]; also contiguous forms | Hints that memory at the active element addresses will be used. A hint only: it loads no register. | – |
Moves, selects and inserts
| Mnemonic | Syntax | What it does | Flags |
|---|---|---|---|
mov | mov z0.d, z0.d; mov z0.b, p0/m, z0.b; also from a general or SIMD register, with an immediate, from an indexed element, and between predicates | Copies a register, a scalar or an immediate into a vector, or copies a predicate. The predicated forms copy only active elements. An alias of orr, sel, and and the duplicate and copy instructions. | – |
movprfx | movprfx z0.b, p0/z, z0.b; also /m and unpredicated | A prefix for the next instruction. It copies a vector into the destination, so that a destructive instruction can use it as its first source. The next instruction must use the same destination. | – |
sel | sel z1.b, p0, z0.b, z0.b; also on predicates | Takes each active element from the first source and each inactive element from the second. | – |
dupm | dupm z0.s, #0x1 | Repeats a bitmask immediate through the vector. | – |
index | index z0.b, #0x0, #0x0; also with registers | Writes a sequence to the vector: element n is the start value plus n times the step. | – |
insr | insr z0.b, w0; also a SIMD scalar | Shifts the elements up by one position and writes a scalar to the lowest element. | – |
lasta | lasta w0, p0, z0.b; also a SIMD scalar | Extracts the element after the last active element. If that position is past the end of the vector, or no element is active, element 0 is used. | – |
lastb | lastb w0, p0, z0.b; also a SIMD scalar | Extracts the last active element. If no element is active, the highest element is used. | – |
clasta, clastb | clasta z0.b, p0, z0.b, z0.b; also scalar destinations | As lasta or lastb, taken from the last operand, but only if an element is active. The vector forms copy the value to every element. With no active element, a vector destination keeps its value and a scalar destination keeps its low element-sized bits, zero-extended. | – |
compact | compact z0.d, p0, z0.d | Copies the active elements to the lowest positions, in order, and clears the rest. | – |
splice | splice z0.b, p0, z0.b, z0.b | Copies the elements from the first through the last active element of the first source to the lowest positions, then fills the rest from the low elements of the second source. | – |
Permutes
| Mnemonic | Syntax | What it does | Flags |
|---|---|---|---|
ext | ext z0.b, z0.b, z0.b, #0x0 | Takes a vector’s worth of bytes from the pair of sources, starting at the byte index in the immediate. | – |
tbl | tbl z0.b, { z0.b }, z0.b | Table lookup. Each element of the last operand is an index into the source vector, and an index out of range gives 0. | – |
rev | rev z0.b, z0.b; also on predicates | Reverses the order of all elements. | – |
revb, revh, revw | revb z0.h, p0/m, z0.h | Reverses the bytes, halfwords or words within each active element. | – |
sunpklo, sunpkhi, uunpklo, uunpkhi | sunpkhi z0.h, z0.b | Unpacks the low or high half of the source into elements of twice the size, sign-extending or zero-extending. | – |
punpklo, punpkhi | punpkhi p0.h, p0.b | Unpacks the low or high half of a predicate into a predicate for elements of twice the size. | – |
zip1, zip2 | zip1 p0.b, p0.b, p0.b; also on vectors | Interleaves the elements of the low halves, or of the high halves, of the two sources. | – |
uzp1, uzp2 | uzp1 p0.b, p0.b, p0.b; also on vectors | Concatenates the even-numbered elements, or the odd-numbered elements, of the two sources. | – |
trn1, trn2 | trn1 p0.b, p0.b, p0.b; also on vectors | Interleaves the even-numbered elements, or the odd-numbered elements, of the two sources as pairs. | – |
Floating-point arithmetic
| Mnemonic | Syntax | What it does | Flags |
|---|---|---|---|
fadd, fsub | fadd z0.h, z0.h, z0.h; also predicated, and predicated with an immediate | Adds or subtracts. | – |
fsubr | fsubr z0.h, p0/m, z0.h, z0.h; also with an immediate | Reversed subtract: the second operand minus the first. | – |
fabd | fabd z0.h, p0/m, z0.h, z0.h | Absolute difference. | – |
fmul | fmul z0.h, z0.h, z0.h; also predicated, indexed, and predicated with an immediate | Multiplies. | – |
fmulx | fmulx z0.h, p0/m, z0.h, z0.h | Multiplies, except that infinity times 0 gives 2 with the sign of the product, not a default NaN. | – |
fdiv, fdivr | fdiv z0.h, p0/m, z0.h, z0.h | Divides. fdivr divides the second operand by the first. | – |
fmax, fmin, fmaxnm, fminnm | fmax z0.h, p0/m, z0.h, z0.h; also with an immediate | Maximum or minimum. With fmaxnm and fminnm, a quiet NaN against a number gives the number. fmax and fmin give a NaN. | – |
fabs, fneg | fabs z0.h, p0/m, z0.h | Absolute value or negation. | – |
fsqrt | fsqrt z0.h, p0/m, z0.h | Square root. | – |
fmla, fmls, fnmla, fnmls | fmla z0.h, z0.h, z0.h[0]; fnmla z0.h, p0/m, z0.h, z0.h; fmla and fmls also predicated | Fused multiply-accumulate on the destination D and the sources A and B. fmla gives D + A × B; fmls gives D − A × B; fnmla gives −D − A × B; fnmls gives −D + A × B. | – |
fmad, fmsb, fnmad, fnmsb | fmad z0.h, p0/m, z0.h, z0.h | Fused multiply-accumulate that overwrites a multiplicand. With destination D and sources A and B, fmad gives B + D × A; fmsb gives B − D × A; fnmad gives −B − D × A; fnmsb gives −B + D × A. | – |
fcadd | fcadd z0.h, p0/m, z0.h, z0.h, #90 | Complex add, with the second operand rotated by 90 or 270 degrees. Each complex number is a pair of elements. | – |
fcmla | fcmla z0.h, z0.h, z0.h[0], #0; also predicated | Complex multiply-accumulate with a rotation of 0, 90, 180 or 270 degrees. | – |
fmmla | fmmla z0.d, z0.d, z0.d | Matrix multiply-accumulate: for each 2×2 matrix of elements in the sources, adds the product to the destination. | – |
fscale | fscale z0.h, p0/m, z0.h, z0.h | Multiplies each element by 2 to the power of the signed integer in the second operand. | – |
frecpe, frsqrte | frecpe z0.h, z0.h | Estimates the reciprocal, or the reciprocal square root. | – |
frecps, frsqrts | frecps z0.h, z0.h, z0.h | One Newton-Raphson step, used to refine an estimate from frecpe or frsqrte. | – |
frecpx | frecpx z0.h, p0/m, z0.h | Reciprocal exponent. Inverts the exponent and clears the fraction of each active element. | – |
fexpa | fexpa z0.h, z0.h | Helps compute the exponential function. Low bits of each integer source element index a table of fractions, and the bits above them become the exponent. | – |
ftmad | ftmad z0.h, z0.h, z0.h, #0x0 | Trigonometric multiply-add. Multiplies the destination by the absolute value of the source and adds a table coefficient chosen by the immediate and the sign of the source. | – |
ftsmul | ftsmul z0.h, z0.h, z0.h | Trigonometric starting value. Squares each element of the first source and takes the sign of the result from bit 0 of the matching element of the second source. | – |
ftssel | ftssel z0.h, z0.h, z0.h | Trigonometric select. Gives 1.0 if bit 0 of the second source element is 1, otherwise the first source element. Bit 1 of the second source element then inverts the sign. | – |
fmov | fmov z0.h, p0/m, #2.00000000; also unpredicated | Writes a floating-point immediate to every element, or to the active elements. | – |
Floating-point rounding and conversion
| Mnemonic | Syntax | What it does | Flags |
|---|---|---|---|
frintn, frinta, frintp, frintm, frintz, frinti, frintx | frintn z0.h, p0/m, z0.h | Rounds to an integral value, kept in floating point. n rounds to nearest with ties to even, a to nearest with ties away from zero, p towards plus infinity, m towards minus infinity, z towards zero, i by the current mode, and x by the current mode and signals inexact. | – |
fcvt | fcvt z0.h, p0/m, z0.s | Converts between half, single and double precision. | – |
fcvtzs, fcvtzu | fcvtzs z0.h, p0/m, z0.h | Converts to a signed or unsigned integer, rounding towards zero. | – |
scvtf, ucvtf | scvtf z0.h, p0/m, z0.h | Converts a signed or unsigned integer to floating point. | – |
Floating-point reductions and compares
Floating-point compares write a predicate but do not change NZCV. Use
ptest to set the flags from the result.
| Mnemonic | Syntax | What it does | Flags |
|---|---|---|---|
faddv | faddv h0, p0, z0.h | Adds the active elements into a scalar by recursive pairwise reduction. | – |
fadda | fadda h0, p0, h0, z0.h | Adds the active elements to a scalar, strictly from the lowest element up. | – |
fmaxv, fminv, fmaxnmv, fminnmv | fmaxv h0, p0, z0.h | Largest or smallest active element. The nm forms prefer a number to a quiet NaN. | – |
fcmeq, fcmne, fcmge, fcmgt | fcmeq p0.h, p0/z, z0.h, z0.h; also compared with #0.0 | Equal, not equal, greater or equal, greater. | – |
fcmle, fcmlt | fcmle p0.h, p0/z, z0.h, #0.0 | Less or equal, or less than, compared with zero. | – |
fcmuo | fcmuo p0.h, p0/z, z0.h, z0.h | True where either value is a NaN. | – |
facge, facgt | facge p0.h, p0/z, z0.h, z0.h | Compares absolute values: greater or equal, or greater. | – |
BFloat16
| Mnemonic | Syntax | What it does | Flags |
|---|---|---|---|
bfcvt | bfcvt z0.h, p0/m, z0.s | Converts single precision to BFloat16. | – |
bfdot | bfdot z0.s, z0.h, z0.h; also indexed | Dot product. Multiplies pairs of BFloat16 elements and adds the two products to each single-precision destination element. | – |
bfmlalb, bfmlalt | bfmlalb z0.s, z0.h, z0.h; also indexed | Widens the even-numbered (b) or odd-numbered (t) BFloat16 elements to single precision, multiplies them, and adds the product to the destination. | – |
bfmlslb, bfmlslt | bfmlslb z0.s, z0.h, z0.h | As above, subtracting the product from the destination. | – |
bfmmla | bfmmla z0.s, z0.h, z0.h | In each 128-bit segment, multiplies a 2×4 matrix of BFloat16 values by a 4×2 matrix and adds the 2×2 single-precision product to the destination. | – |
Links
Reference
- Arm A64 Instruction Set Architecture – Arm’s description of each A64 instruction
- Arm Architecture Reference Manual for A-profile – the full architecture specification