65816 Instruction Set – Data transfer, stack and block moves

Loads, stores, register transfers, the stack and MVN and MVP

Introduction

Loads and stores work on the accumulator (width by M) or an index register (width by X). The 65816 adds STZ (store zero) to the 6502’s set, 16-bit stack pushes and pulls, three more places to push an address, transfers to and from the stack pointer and the direct page register, and two block moves.

Loads and stores

Each form is written mode opcode, bytes, cycles, then the cycle tags. Bytes “2 or 3” is the immediate form, which is 3 when the flag that follows is clear.

InstructionFormsWhat it doesFlags
ldaimm A9, 2 or 3, 2 +M
dp A5, 2, 3 +M +DL
dp,X B5, 2, 4 +M +DL
abs AD, 3, 4 +M
abs,X BD, 3, 4 +M +P
abs,Y B9, 3, 4 +M +P
long AF, 4, 5 +M
long,X BF, 4, 5 +M
(dp) B2, 2, 5 +M +DL
(dp,X) A1, 2, 6 +M +DL
(dp),Y B1, 2, 5 +M +DL +P
[dp] A7, 2, 6 +M +DL
[dp],Y B7, 2, 6 +M +DL
sr,S A3, 2, 4 +M
(sr,S),Y B3, 2, 7 +M		A = memory (8 or 16 bits).N Z
ldximm A2, 2 or 3, 2 +X
dp A6, 2, 3 +X +DL
dp,Y B6, 2, 4 +X +DL
abs AE, 3, 4 +X
abs,Y BE, 3, 4 +X +P		X = memory.N Z
ldyimm A0, 2 or 3, 2 +X
dp A4, 2, 3 +X +DL
dp,X B4, 2, 4 +X +DL
abs AC, 3, 4 +X
abs,X BC, 3, 4 +X +P		Y = memory.N Z
stadp 85, 2, 3 +M +DL
dp,X 95, 2, 4 +M +DL
abs 8D, 3, 4 +M
abs,X 9D, 3, 5 +M
abs,Y 99, 3, 5 +M
long 8F, 4, 5 +M
long,X 9F, 4, 5 +M
(dp) 92, 2, 5 +M +DL
(dp,X) 81, 2, 6 +M +DL
(dp),Y 91, 2, 6 +M +DL
[dp] 87, 2, 6 +M +DL
[dp],Y 97, 2, 6 +M +DL
sr,S 83, 2, 4 +M
(sr,S),Y 93, 2, 7 +M		Memory = A. There is no immediate form: opcode 89 is BIT.–
stxdp 86, 2, 3 +X +DL
dp,Y 96, 2, 4 +X +DL
abs 8E, 3, 4 +X		Memory = X.–
stydp 84, 2, 3 +X +DL
dp,X 94, 2, 4 +X +DL
abs 8C, 3, 4 +X		Memory = Y.–
stzdp 64, 2, 3 +M +DL
dp,X 74, 2, 4 +M +DL
abs 9C, 3, 4 +M
abs,X 9E, 3, 5 +M		Memory = 0 (8 or 16 bits, by M).–

Register transfers

All are one byte and two cycles (XBA three). A transfer to a register of a smaller width copies only the low byte; to a larger one, the register’s high byte is zero. TCD, TDC, TCS and TSC always use the full 16-bit accumulator.

InstructionFormsWhat it doesFlags
taximp AA, 1, 2X = A (the width of X).N Z
tayimp A8, 1, 2Y = A (the width of Y).N Z
txaimp 8A, 1, 2A = X (the width of A).N Z
tyaimp 98, 1, 2A = Y (the width of A).N Z
txyimp 9B, 1, 2Y = X.N Z
tyximp BB, 1, 2X = Y.N Z
tsximp BA, 1, 2X = the stack pointer (the width of X).N Z
txsimp 9A, 1, 2The stack pointer = X. In emulation mode only the low byte is set; in native mode the full 16 bits.–
tcdimp 5B, 1, 2The direct page register = the 16-bit accumulator.N Z
tdcimp 7B, 1, 2The 16-bit accumulator = the direct page register.N Z
tcsimp 1B, 1, 2The stack pointer = the 16-bit accumulator (low byte only in emulation mode). Also written TAS.–
tscimp 3B, 1, 2The 16-bit accumulator = the stack pointer. Also written TSA.N Z
xbaimp EB, 1, 3Exchange the two bytes of the 16-bit accumulator. N and Z reflect the new low byte, whatever M is. Also written SWA.N Z

The stack

The stack grows downward from S. A push stores at S and then decrements it; a pull increments S and reads. Pushes and pulls of the accumulator and index registers are 16 bits when the flag that follows them is clear.

InstructionFormsWhat it doesFlags
phaimp 48, 1, 3 +MPush A (1 or 2 bytes).–
phpimp 08, 1, 3Push the status register. In emulation mode the pushed copy has the B flag (bit 4) set.–
phximp DA, 1, 3 +XPush X (1 or 2 bytes).–
phyimp 5A, 1, 3 +XPush Y (1 or 2 bytes).–
phbimp 8B, 1, 3Push the data bank register.–
phdimp 0B, 1, 4Push the direct page register (2 bytes).–
phkimp 4B, 1, 3Push the program bank register.–
plaimp 68, 1, 4 +MPull A (1 or 2 bytes).N Z
plpimp 28, 1, 4Pull the status register. In native mode this sets M and X from the stack, which a disassembler cannot know; setting X clears the high bytes of X and Y.N V M X D I Z C
plximp FA, 1, 4 +XPull X (1 or 2 bytes).N Z
plyimp 7A, 1, 4 +XPull Y (1 or 2 bytes).N Z
plbimp AB, 1, 4Pull the data bank register. The usual way to set it: phk then plb.N Z
pldimp 2B, 1, 5Pull the direct page register (2 bytes).N Z
peaabs F4, 3, 5Push the 16-bit operand itself (not what it addresses).–
pei(dp) D4, 2, 6 +DLPush the 16-bit word at the direct page address.–
perrel long 62, 3, 6Push the address of the instruction after it plus the signed 16-bit operand: a position-independent address.–

Block moves

InstructionFormsWhat it doesFlags
mvnblock 54, 3, 7 per byteCopies C + 1 bytes (C is the 16-bit accumulator whatever M is) from the source bank at X to the destination bank at Y, ascending: X and Y each increase, C decreases, and DB is set to the destination bank. The instruction repeats itself until C is $FFFF. Written mvn src,dst; the bytes are the destination bank, then the source. With 8-bit index registers X and Y wrap at the end of the page.–
mvpblock 44, 3, 7 per byteThe same, descending: X and Y decrease, so X and Y start at the last byte. Use it when the destination overlaps the source and is above it.–

Not described

Known, not yet covered

  • Reference: the detail of interrupts during a block move (it can be interrupted between bytes and resumes) and the wrap rules of the stack in emulation mode for PEA, PEI and PER.

Links

Reference