Instruction length
Instructions are stored little-endian in 16-bit parcels, and the low bits of the first parcel say how many parcels the instruction has. This is what lets the decoder start at any 2-byte step.
| Bits of the first parcel | Length | Use |
|---|---|---|
xxxxxxxxxxxxxxaa, aa ≠ 11 | 16 bits | The compressed instructions (aa = 00, 01, 10 are the three quadrants) |
xxxxxxxxxxxbbb11, bbb ≠ 111 | 32 bits | All the base and standard 32-bit instructions |
xxxxxxxxxx011111 | 48 bits | Reserved: no standard extension uses it |
xxxxxxxxx0111111 | 64 bits | Reserved |
xnnnxxxxx1111111, nnn ≠ 111 | 80 + 16·nnn bits | Reserved |
x111xxxxx1111111 | 192 bits or more | Reserved for even longer instructions |
The explorer skips a reserved long instruction by its length field (up to 22 bytes) and shows it as unknown bytes. An encoding of 192 bits or more is read as 2 bytes. Without the C extension, instructions must start on 4-byte boundaries; the explorer always allows 2-byte starts.
The 32-bit formats
Bit 31 is on the left. The opcode is bits 6:0 and the low two bits are always 11.
| Format | 31–25 | 24–20 | 19–15 | 14–12 | 11–7 | 6–0 | Used by |
|---|---|---|---|---|---|---|---|
| R | funct7 | rs2 | rs1 | funct3 | rd | opcode | Register-register: add, mul, fadd, amo |
| I | imm[11:0] | rs1 | funct3 | rd | opcode | addi, loads, jalr, csr (imm = the CSR number) | |
| S | imm[11:5] | rs2 | rs1 | funct3 | imm[4:0] | opcode | Stores |
| B | imm[12|10:5] | rs2 | rs1 | funct3 | imm[4:1|11] | opcode | Branches (offset in multiples of 2) |
| U | imm[31:12] | rd | opcode | lui, auipc | |||
| J | imm[20|10:1|11|19:12] | rd | opcode | jal (offset in multiples of 2) | |||
| R4 | rs3, fmt | rs2 | rs1 | rm | rd | opcode | Fused multiply-add |
The immediates of B and J are scattered so that bit 31 is always the sign and the bits stay in nearly the
same place from format to format. In the floating-point formats funct3 is the rounding mode
(rm: 0 rne, 1 rtz, 2 rdn, 3 rup, 4 rmm, 7 dyn; 5 and 6 are reserved).
The opcodes (bits 6:2) are: 00000 LOAD, 00001 LOAD-FP, 00011 MISC-MEM, 00100 OP-IMM, 00101 AUIPC, 00110 OP-IMM-32,
01000 STORE, 01001 STORE-FP, 01011 AMO, 01100 OP, 01101 LUI, 01110 OP-32, 10000 MADD, 10001 MSUB, 10010 NMSUB,
10011 NMADD, 10100 OP-FP, 10101 OP-V, 11000 BRANCH, 11001 JALR, 11011 JAL, 11100 SYSTEM, 11101 OP-VE (the
vector cryptography instructions); the others are reserved or kept for custom use.
The 16-bit formats
Bits 15:13 are funct3 and bits 1:0 the quadrant. The fields differ with each instruction (see the compressed page); the formats are:
| Format | 15–13 | 12–10 | 9–7 | 6–5 | 4–2 | 1–0 |
|---|---|---|---|---|---|---|
| CR (register) | funct4 (15–12) | rd/rs1 (11–7) | rs2 (6–2) | op | ||
| CI (immediate) | funct3 | imm (12) | rd/rs1 (11–7) | imm (6–2) | op | |
| CSS (stack store) | funct3 | imm (12–7) | rs2 (6–2) | op | ||
| CIW (wide immediate) | funct3 | imm (12–5) | rd′ | op | ||
| CL (load) | funct3 | imm | rs1′ | imm | rd′ | op |
| CS (store) | funct3 | imm | rs1′ | imm | rs2′ | op |
| CA (arithmetic) | funct6 (15–10) | rd′/rs1′ | funct2 | rs2′ | op | |
| CB (branch) | funct3 | offset | rs1′ | offset | op | |
| CJ (jump) | funct3 | jump target (12–2) | op | |||
Where this is read
The field positions are in explorer/cpu/riscv/fields.js (one entry per operand name) and
the length rule in lengthOf in decode.js. Source: the “RV32/64G Instruction Set
Listings”, “C Extension” and “Zc*” chapters of the
unprivileged manual.