Introduction
A great deal of machine code comes with nothing around it: a .bin cut from a flash chip, a ROM dumped from a cartridge, a boot sector, the output of
objcopy -O binary. The bytes say nothing about the processor they were written for, where they were loaded, or where they start. Raw machine code is the
explorer’s way of reading such a file anyway: you say which CPU it is for, and the explorer disassembles the bytes with that CPU’s decoder, at the address you give.
Nothing here guesses. The explorer does not look at the bytes to pick a CPU, and it never opens a file as raw machine code by itself: not by its extension, not by Identify, not by any automatic choice. The family appears only in the Read as list, under Raw / headerless, and runs when you pick it. The viewer says so in its first lines: the CPU is chosen by you.
It reads the file with the same decoders that disassemble ELF programs, Mach-O files, the console ROM formats and the firmware images, so each CPU’s instruction set page (the CPU list links every one) describes exactly what the disassembly shows.
What the viewer shows
- Raw code tab: a short table (the CPU and variant, the byte order where there is a choice, the size, the code region, the base address, the entry point, the labels) and a Code region you open for the disassembly.
- The disassembly: an instruction decoded at every byte, laid out in columns as the other code viewers do (the first column is the plain reading from the start; the
others hold the instructions that begin inside it, which is how you see where a different starting point would have led). The row of the entry point is labelled
entry. Highlighting and the legend are the CPU’s own statuses: documented, undocumented, unstable, jam, reserved, illegal and so on. - The hex view of the file beside it, with the inspector, as for every file.
- Structure tab: the file as up to three parts: the bytes before the code region, the code region, the bytes after it.
The options
They are in the bar above the viewer, and changing one reads the file again at once. Options that belong to one CPU are shown only while that CPU is chosen.
| Option | What it does |
|---|---|
| CPU family, CPU | The instruction set. A choice has no groups, so it is made in two steps: the family (x86, ARM, RISC-V, MIPS, PowerPC, SuperH, 68000 family, 6502 family, Z80 family, Classic 8/16-bit, Atmel/TI microcontrollers, DEC, Console CPUs, Other), then the CPU in it. The first CPU of the first family is the starting choice; that is a default, not a guess. |
| Variant / mode | The chip, model or mode: x86 in 16, 32 or 64-bit mode, the 6502 or its 65C02 and NES forms, the Z80 or the Game Boy’s SM83, ARM state or Thumb, a RISC-V extension set, a MIPS level, a SuperH chip, a PowerPC model, an AVR core, a PDP-11 model. |
| Byte order | Shown only for a CPU that runs in both orders (MIPS, PowerPC, SuperH, Xtensa). The other CPUs have one order, which the CPU list gives. |
| The CPU’s own options | What the decoder offers: register names and pseudo-instructions (RISC-V, MIPS, ARM, PowerPC, AVR, MSP430, 68000), the assembler syntax (68000, SuperH, PDP-11, 6809), the processor state the code starts in (65816 M and X flags, emulation mode), and similar. Each is described on the CPU list. |
| Base address | The address of the first byte of the code region. Typed as 0x8000, $8000 or 8000h. For the CP1610 it counts 16-bit words, as that processor’s addresses do. |
| Entry offset | The offset of the entry point from the first byte of the region, in bytes. It is labelled in the disassembly, which opens there. |
| Region start, Region length | The part of the file that is code: a file offset and a length (0 is to the end). Use them to skip a header or a trailing table you know about; the base address belongs to the first byte of the region. |
| Labels | Names for known addresses. Today the only choice is No labels; a platform’s memory map (its hardware register names) is added as a further choice when that platform has been described. |
Not described
Known, not yet covered
- Viewer: memory maps. The Labels choice offers only No labels; the hardware register names of a platform (Arcadia, Intellivision, Channel F, TI-99, Atari 2600 and others) belong to platform viewers that are not built yet, and each will add its own labels and a page that says it is reached through Read as.
- Viewer: code that mixes modes. A region is decoded in one variant throughout (ARM state or Thumb, a fixed 65816 starting state that the layout follows through REP and SEP but not through jumps); there is no way yet to say that a part of the file is data, or that a later part is in another mode.
- Viewer: a CPU the registry does not list yet: only the instruction sets this site has decoders for are offered (see the CPU list), so the 8051, the Z8000 and many others are missing. Adding one is a single small adapter file once its decoder exists.
- Reference: this page group describes how the family is used. The instruction sets themselves are on the CPU pages, each with its own list of what is not described.
Unknown
- Viewer: which CPU a given headerless file is for. The explorer does not try to find out, and a guess from the bytes alone would often be wrong: most byte sequences are valid code for several processors.
Links
Reference
- Opening a file with Read as – how to reach the viewer
- The CPU list – every CPU, variant and option
- Raw Cortex-M firmware image – a headerless format the explorer does recognise, by its vector table
- ELF – the program format whose code the same decoders read, with the CPU taken from the file