MSP430 Instruction Set – Emulated instructions

The names TI’s assembler gives to core instructions with a constant or a fixed register

What they are

The processor has no instruction named RET or CLR: the assembler accepts such names and encodes a core instruction with a constant from the constant generators or a fixed register. The result is the same bytes as writing the core instruction, so a disassembler can show either. The explorer shows the emulated name by default (as TI’s tools do) and the core instruction as encoded when Emulated instructions is off.

A name is used only when the encoding is the one the assembler produces: the constant must come from R2 or R3 (inc r5 is add #1, r5 encoded with the constant generator and is two bytes; the same instruction written with an immediate word, four bytes, is shown as add #0x1, r5). Of the byte forms, .B follows the name (clr.b, inc.b). When two names fit one encoding the more specific is used.

The 24 emulated instructions

EmulatedCore instructionOperation
ADC dstADDC #0,dstAdds the carry.
BR dstMOV dst,PCBranches to the address in dst (word form only).
CLR dstMOV #0,dstClears dst.
CLRCBIC #1,SRClears the carry.
CLRNBIC #4,SRClears the negative flag.
CLRZBIC #2,SRClears the zero flag.
DADC dstDADD #0,dstAdds the carry, decimally.
DEC dstSUB #1,dstSubtracts 1.
DECD dstSUB #2,dstSubtracts 2.
DINTBIC #8,SRDisables interrupts (clears GIE).
EINTBIS #8,SREnables interrupts (sets GIE).
INC dstADD #1,dstAdds 1.
INCD dstADD #2,dstAdds 2.
INV dstXOR #−1,dstComplements dst.
NOPMOV #0,R3Does nothing (writing R3 has no effect).
POP dstMOV @SP+,dstPops a word from the stack.
RETMOV @SP+,PCReturns from a subroutine.
RLA dstADD dst,dstShifts dst left one bit (arithmetic).
RLC dstADDC dst,dstRotates dst left through the carry.
SBC dstSUBC #0,dstSubtracts the borrow.
SETCBIS #1,SRSets the carry.
SETNBIS #4,SRSets the negative flag.
SETZBIS #2,SRSets the zero flag.
TST dstCMP #0,dstCompares dst with 0 (sets N, Z).

llvm (the comparison tool) writes ret, nop, pop, br, clr, inc, incd, dec, decd, adc, dadc, sbc, tst, inv, clrc, clrn, clrz, setc, setn, setz, dint and eint but not rla and rlc, and br and pop only for some operand forms; the explorer writes all 24. Where the names differ, the check treats the unaliased forms as the same instruction.

The conditional jumps have two names each as well (JNE/JNZ, JEQ/JZ, JLO/JNC, JHS/JC); they are one encoding, written with the first.

Not described

  • The extended emulated instructions of the MSP430X (RPT and the X forms are on the MSP430X page); the emulated forms are applied to the core instructions of the 16-bit encoding only, not to the extended ones.