CDP1802 Instruction Set – Opcode map

All 256 opcodes

Introduction

The row is the high nibble of the opcode and the column the low nibble. In the rows 0, 1, 2, 4, 5, 8, 9, A, B, D and E the low nibble is the register N; in row 6 it is the port. A cell shows the instruction. The one reserved opcode is shaded.

The map

x0x1x2x3x4x5x6x7x8x9xAxBxCxDxExF
0xIDLLDNLDNLDNLDNLDNLDNLDNLDNLDNLDNLDNLDNLDNLDNLDN
1xINCINCINCINCINCINCINCINCINCINCINCINCINCINCINCINC
2xDECDECDECDECDECDECDECDECDECDECDECDECDECDECDECDEC
3xBRBQBZBDFB1B2B3B4SKPBNQBNZBNFBN1BN2BN3BN4
4xLDALDALDALDALDALDALDALDALDALDALDALDALDALDALDALDA
5xSTRSTRSTRSTRSTRSTRSTRSTRSTRSTRSTRSTRSTRSTRSTRSTR
6xIRXOUTOUTOUTOUTOUTOUTOUT-INPINPINPINPINPINPINP
7xRETDISLDXASTXDADCSDBSHRCSMBSAVMARKREQSEQADCISDBISHLCSMBI
8xGLOGLOGLOGLOGLOGLOGLOGLOGLOGLOGLOGLOGLOGLOGLOGLO
9xGHIGHIGHIGHIGHIGHIGHIGHIGHIGHIGHIGHIGHIGHIGHIGHI
AxPLOPLOPLOPLOPLOPLOPLOPLOPLOPLOPLOPLOPLOPLOPLOPLO
BxPHIPHIPHIPHIPHIPHIPHIPHIPHIPHIPHIPHIPHIPHIPHIPHI
CxLBRLBQLBZLBDFNOPLSNQLSNZLSNFLSKPLBNQLBNZLBNFLSIELSQLSZLSDF
DxSEPSEPSEPSEPSEPSEPSEPSEPSEPSEPSEPSEPSEPSEPSEPSEP
ExSEXSEXSEXSEXSEXSEXSEXSEXSEXSEXSEXSEXSEXSEXSEXSEX
FxLDXORANDXORADDSDSHRSMLDIORIANIXRIADISDISHLSMI

The reserved opcode

Opcode 68 is not defined by the CDP1802. The CDP1804, CDP1805 and CDP1806 use it as a prefix: 68 followed by a second opcode byte selects one of their extra instructions (counter and timer control, subroutine call and return, a decrement-and-branch, decimal arithmetic and others), some with 16-bit operands. This decoder shows 68 as a one-byte reserved opcode (status Reserved); a program for those chips will show wrong code after it. What a plain CDP1802 does when it executes 68 is not documented in the sources read.

Not described

Known, not yet covered

  • Reference: the 68-prefixed instruction map of the CDP1804 to CDP1806.

Unknown

  • Reference: the behaviour of a plain CDP1802 on opcode 68.

Links

Reference

  • CPU differences – the Emma 02 page: the instructions the CDP1804, CDP1805 and CDP1806 add
  • RCA 1802 – Wikipedia