CDP1802 Instruction Set

Introduction

The CDP1802 is RCA’s COSMAC microprocessor (1976), an 8-bit CMOS processor with a 16-bit address bus, built for low power. Its machines include the COSMAC Elf (Popular Electronics, 1976), the RCA Studio II game console (1977), the Telmac and the Super Elf. Instead of a few registers and many addressing modes it has sixteen 16-bit registers, R0 to RF, one 8-bit accumulator D and a one-bit data flag DF. Any of the sixteen can be the program counter (the four-bit register P selects it) or the data pointer (X selects it): an instruction names the register it uses in its low four bits, or works through R(X) or R(P). A subroutine call is a change of P (SEP), not a push.

Opcodes are one byte; the high nibble is the operation and the low nibble the register or the variant. Instructions are 1, 2 or 3 bytes. Of the 256 opcodes 255 are instructions; opcode 68 is reserved for the extended instructions of the CDP1804, CDP1805 and CDP1806, which this decoder does not cover.

The pages: registers and flags, opcode formats and branches, every instruction and the opcode map.

Statuses in the disassembly

Notation

Upper-case mnemonics, hexadecimal with $, registers R0 to RF (the decimal register option writes R10): LDI $7E, PLO R3, SEP R5, OUT 4, BNZ $0214, LBR $1234. A branch shows the address it goes to; a short branch is in the page of its operand byte. Alternative names are shown on the instruction pages (BPZ and BGE for BDF, BM and BL for BNF, NBR for SKP, NLBR for LSKP, RSHR for SHRC, RSHL for SHLC).

Not described

Known, not yet covered

• Reference: the CDP1804, CDP1805 and CDP1806 extended instructions (68 followed by a second opcode): counter/timer, SCAL and SRET, DBNZ, decimal add and subtract, and others. The sources read did not list them.
• Reference: DMA, interrupts and the cycle-level states (S0 to S3), the Pixie video chip, and the machine memory maps and file formats (Elf hex, Studio II .st2, Telmac tapes): later pages.
• Viewer: every byte is decoded as an instruction and the register values are not tracked, so SEP calls and register-indirect memory accesses are not followed.

Unknown

• Reference: the cycle count of IDL, and what a plain CDP1802 does with opcode 68.
• Reference: the one core read (the Cosmac Elf core of emulators.org) differs from the manual on two points, listed on the registers and formats pages: RET and DIS increment the register selected by the new X, and a short branch at the last-but-one byte of a page takes the next page.

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