Introduction
These instructions move bytes between the registers and memory, and between the registers and the stack. Loads and register transfers set N and Z from the value moved; stores change no flags. A store never reads the byte it replaces. The modes are on the addressing modes page. Every instruction here is documented on the NMOS 6502 and the 65C02 unless the table says otherwise.
The instructions
Each form is written mode opcode, bytes, cycles; “+1 page” is one more cycle when an index crosses a page boundary.
| Instruction | Forms | What it does | Flags |
|---|---|---|---|
lda | imm A9, 2, 2zp A5, 2, 3zp,X B5, 2, 4abs AD, 3, 4abs,X BD, 3, 4 +1 pageabs,Y B9, 3, 4 +1 page(zp,X) A1, 2, 6(zp),Y B1, 2, 5 +1 page(zp) B2, 2, 5 (65C02) | Loads the accumulator. | N Z |
ldx | imm A2, 2, 2zp A6, 2, 3zp,Y B6, 2, 4abs AE, 3, 4abs,Y BE, 3, 4 +1 page | Loads X. | N Z |
ldy | imm A0, 2, 2zp A4, 2, 3zp,X B4, 2, 4abs AC, 3, 4abs,X BC, 3, 4 +1 page | Loads Y. | N Z |
sta | zp 85, 2, 3zp,X 95, 2, 4abs 8D, 3, 4abs,X 9D, 3, 5abs,Y 99, 3, 5(zp,X) 81, 2, 6(zp),Y 91, 2, 6(zp) 92, 2, 5 (65C02) | Stores the accumulator. An indexed store always takes the extra cycle, so it takes the same time whether or not a page is crossed. | – |
stx | zp 86, 2, 3zp,Y 96, 2, 4abs 8E, 3, 4 | Stores X. | – |
sty | zp 84, 2, 3zp,X 94, 2, 4abs 8C, 3, 4 | Stores Y. | – |
tax | implied AA, 1, 2 | X = A. | N Z |
tay | implied A8, 1, 2 | Y = A. | N Z |
txa | implied 8A, 1, 2 | A = X. | N Z |
tya | implied 98, 1, 2 | A = Y. | N Z |
tsx | implied BA, 1, 2 | X = S, the stack pointer. | N Z |
txs | implied 9A, 1, 2 | S = X. The only transfer that changes no flags. | – |
pha | implied 48, 1, 3 | Pushes A: writes it at $0100 + S, then decrements S. | – |
php | implied 08, 1, 3 | Pushes P with the B flag (bit 4) and the unused bit (bit 5) set in the pushed copy. | – |
pla | implied 68, 1, 4 | Increments S, then loads A from $0100 + S. | N Z |
plp | implied 28, 1, 4 | Increments S, then loads P from the stack. Bits 4 and 5 are ignored: they are not in the register. | all of N V D I Z C |
Added by the 65C02
The 65C02 adds more transfers on this theme:
| Instruction | Forms | What it does | Flags |
|---|---|---|---|
stz | zp 64, 2, 3zp,X 74, 2, 4abs 9C, 3, 4abs,X 9E, 3, 5 | Stores zero. | – |
phx | implied DA, 1, 3 | Pushes X. | – |
phy | implied 5A, 1, 3 | Pushes Y. | – |
plx | implied FA, 1, 4 | Pulls X. | N Z |
ply | implied 7A, 1, 4 | Pulls Y. | N Z |
On the NMOS 6502 these opcodes are different: 64 and 74 are
undocumented NOPs, 9C and 9E are the unstable SHY and SHX,
DA, 5A, FA and 7A are one-byte NOPs, and
B2 and 92 jam the processor.
Notes
- The stack is page one. S points at the next free byte, so a push writes at
$0100 + Sand then decrements S; a pull increments S and then reads. S wraps within the page: after 256 pushes the first byte is overwritten. - The 6510’s port. On the Commodore 64 the addresses
$00and$01are the processor’s own I/O port, so a load or store there reaches the port, not RAM.