Signetics 2650 Instruction Set

Introduction

The Signetics 2650 (1975; the 2650A in 1977 and the 2650B later, also made by Philips) is an 8-bit microprocessor with 7 registers (R0 and two banks of R1 to R3), a program status word split into an upper and a lower byte, a 15-bit address space of four 8 KB pages and an internal return-address stack of eight entries. It is the processor of the Emerson Arcadia 2001 (1982), the Interton VC4000 (1978) and the Elektor TV Games Computer, and of several arcade boards.

Instructions are 1, 2 or 3 bytes. The low two bits of most opcodes are a register (or, for branches, a condition), the next two bits the addressing mode: Z (register), I (immediate), R (relative) or A (absolute), so LODZ, LODI, LODR and LODA are four consecutive groups of four opcodes. Of the 256 opcodes, 246 are instructions; ten are not. Addresses are formed inside the 8 KB page of the instruction, which is the processor’s most unusual feature: see Addressing modes and the 8 KB pages.

The pages: registers and the status word, addressing modes and pages, every instruction and the opcode map.

Statuses in the disassembly

Notation

The Signetics assembler form: upper-case mnemonics, the register or condition after a comma, then the operand; hexadecimal with $; * before an address for an indirect operand; an index register after the address: LODI,R1 $12, LODZ,R2, LODA,R0 $1800,R3-, STRR,R2 *$0123, BCTR,EQ $0412, BCTA,UN $0000, RETC,UN, BRNR,R1 $0408, PPSL $08, ZBSR $0010, BSXA $1000,R3. A branch shows the address it goes to. The conditions are EQ (condition code 0), GT (1), LT (2) and UN (unconditional). Three options change the text: syntax (plain writes lower case), registers (R0 to R3; the second bank written R4 to R6; or bare numbers) and number base ($ hexadecimal, 0x hexadecimal, decimal).

Not described

Known, not yet covered

• Reference: the interrupt and reset sequence in detail (the interrupt vector, the PVI of the Arcadia) and the I/O ports of the machines (the 2650 has a data port, a control port and an extended port: what each machine connects is in the machine pages, later), and the 2650A and 2650B differences (none are known to this work).
• Viewer: every byte is decoded as an instruction; register values are not tracked, so an indirect branch (the pointer is in memory) and a BXA jump table show no target. An instruction at the end of an 8 KB page continues at the start of the same page when those bytes are in the file.

Unknown

• Reference: no manufacturer document was read directly (the Signetics User Manual and the Philips data sheet are PDFs and could not be read by the tools used): everything here rests on a disassembler source (MAME), a modern compatible chip’s documentation (Avalon AS2650-2), a Wikibook, and the behaviour of two emulator cores. The exact meaning of the inter-digit carry on subtraction, the flag effects of the rotates with the carry, whether a conditional branch that is not taken reads its indirect pointer (it costs cycles on a real chip), the exact stack-pointer convention of the return stack, and the state after reset are therefore stated as the cores do them, not as a data sheet.
• Reference: what the ten undefined opcodes do on a real chip (the MAME-derived core read executes them as one-byte no-operations; the AS2650-2 gives them new meanings).

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