Atari ST hardware register addresses

Where the hardware is

The ST’s 68000 has 24 address lines, so the top byte of an address is ignored: $FF8240 and $FFFF8240 (what a 16-bit absolute address sign-extends to) are the same place. The explorer names an instruction that uses such an address from $FF8000 up, in a note: palette, mfp_IERA, keydata and so on. The Hardware names option limits the names to one machine. Registers on a 16-bit bus are at odd or even addresses by chip; a name covers the byte at its address.

Address	Chip	Machines
`$FF8201`, `$FF8203`, `$FF820D`	Shifter: video base address (high, middle, and low on the STE and later); `$FF8205 to $FF8209` the video address counter; `$FF820A` the sync mode	all (the low base byte: STE and later)
`$FF8240` to `$FF825F`	Shifter: the sixteen palette words	all
`$FF8260`, `$FF8262`	Shifter: resolution (shift mode); the TT shift mode	all; TT
`$FF8400`	TT palette, 256 words	TT
`$FF9800`	Falcon palette, 256 longs; the Falcon video controller (VIDEL) at `$FF8260` and up	Falcon
`$FF8604` to `$FF860F`	DMA and the WD1772 floppy controller: access and sector count, mode and status, the DMA address bytes, the floppy speed	all
`$FF8700`, `$FF8781`	TT SCSI DMA and the 5380 SCSI controller	TT
`$FF8800`, `$FF8802`	YM2149 sound chip: write the register number, then read or write the data	all
`$FF8900` and up, `$FF8922`	DMA sound (control, base, current and end addresses, mode); the microwire interface	STE and later; microwire: STE, Mega STE, TT
`$FF8930`, `$FF8936`	Falcon sound matrix and CODEC	Falcon
`$FF8961`	TT real-time clock	TT
`$FF8A00` to `$FF8A41`	Blitter: halftone, source, destination, count, operation, skew	STE and later
`$FF8C81`	SCC Z8530 serial controller	Mega STE, TT, Falcon
`$FF8E01`	System control unit (interrupt mask and status, VME)	Mega STE, TT
`$FFA200`	DSP56001 host interface	Falcon
`$FFFA01` to `$FFFA2F`	MFP 68901: 24 registers, two bytes apart: GPIP, AER, DDR, IERA, IERB, IPRA, IPRB, ISRA, ISRB, IMRA, IMRB, VR, TACR, TBCR, TCDCR, TADR, TBDR, TCDR, TDDR, SCR, UCR, RSR, TSR, UDR	all
`$FFFA81` to `$FFFAAF`	The TT’s second MFP, the same registers	TT
`$FFFC00` to `$FFFC06`	The two ACIA 6850 chips: keyboard control/status and data, MIDI control/status and data	all
`$FFFC21`	Mega STE real-time clock	Mega STE

The register names follow the field names of the Linux kernel’s atarihw.h where it has them. The MFP’s short names (GPIP, AER, …) are the 68901 data sheet’s names, matched to the header’s fields by order. The memory configuration register at $FF8001 and the monitor type at $FF8006 are not named: the pages read did not give them.

Not described

Known, not yet covered

Reference: the individual bits of each register, the Falcon’s video registers one by one, and the ROM and RAM layout (TOS ROM at $E00000, system variables from $400) are not described. The addresses come from the Linux header as the fetch tool summarised it; the DMA address bytes are named as a block because the summary’s byte offsets looked inconsistent.
Viewer: only an absolute address, a #$FFxxxx immediate or a PC-relative-free operand is named; an address built in a register is not followed.

.TOS File Format – Memory map

Where the hardware is

Not described

Known, not yet covered

Links

Reference