Introduction
A Super Nintendo program controls the picture, the sound and the DMA through registers in the
lower half of the system banks ($00–$3F and $80–$BF,
offsets below $8000; see the memory map).
The explorer’s disassembly puts these names on an operand with the register’s offset, in any
bank: the data bank register is not known to a disassembler, and programs set it to zero or
to $80 before using them, so the offset alone is what decides. A name is a hint;
an lda $2100 in a data bank that is not a system bank reads something else. The
names are those the community’s include files use.
Picture processor, $2100–$213F
| Address | Name | Meaning |
|---|---|---|
$2100 | INIDISP | Screen display: forced blank and brightness |
$2101 | OBSEL | Object size and base |
$2102 | OAMADDL | OAM address, low |
$2103 | OAMADDH | OAM address, high and priority |
$2104 | OAMDATA | OAM data write |
$2105 | BGMODE | Background mode and tile sizes |
$2106 | MOSAIC | Mosaic size and enable |
$2107 | BG1SC | Background 1 tilemap address and size |
$2108 | BG2SC | Background 2 tilemap address and size |
$2109 | BG3SC | Background 3 tilemap address and size |
$210A | BG4SC | Background 4 tilemap address and size |
$210B | BG12NBA | Backgrounds 1 and 2 character base |
$210C | BG34NBA | Backgrounds 3 and 4 character base |
$210D | BG1HOFS | Background 1 horizontal scroll |
$210E | BG1VOFS | Background 1 vertical scroll |
$210F | BG2HOFS | Background 2 horizontal scroll |
$2110 | BG2VOFS | Background 2 vertical scroll |
$2111 | BG3HOFS | Background 3 horizontal scroll |
$2112 | BG3VOFS | Background 3 vertical scroll |
$2113 | BG4HOFS | Background 4 horizontal scroll |
$2114 | BG4VOFS | Background 4 vertical scroll |
$2115 | VMAIN | VRAM address increment mode |
$2116 | VMADDL | VRAM address, low |
$2117 | VMADDH | VRAM address, high |
$2118 | VMDATAL | VRAM data write, low |
$2119 | VMDATAH | VRAM data write, high |
$211A | M7SEL | Mode 7 settings |
$211B | M7A | Mode 7 matrix A (and the multiplier operand) |
$211C | M7B | Mode 7 matrix B (and the multiplier operand) |
$211D | M7C | Mode 7 matrix C |
$211E | M7D | Mode 7 matrix D |
$211F | M7X | Mode 7 centre X |
$2120 | M7Y | Mode 7 centre Y |
$2121 | CGADD | Palette address |
$2122 | CGDATA | Palette data write |
$2123 | W12SEL | Window mask settings, backgrounds 1 and 2 |
$2124 | W34SEL | Window mask settings, backgrounds 3 and 4 |
$2125 | WOBJSEL | Window mask settings, objects and colour window |
$2126 | WH0 | Window 1 left |
$2127 | WH1 | Window 1 right |
$2128 | WH2 | Window 2 left |
$2129 | WH3 | Window 2 right |
$212A | WBGLOG | Window mask logic, backgrounds |
$212B | WOBJLOG | Window mask logic, objects and colour |
$212C | TM | Main screen designation |
$212D | TS | Sub screen designation |
$212E | TMW | Window mask for the main screen |
$212F | TSW | Window mask for the sub screen |
$2130 | CGWSEL | Colour addition select |
$2131 | CGADSUB | Colour math designation |
$2132 | COLDATA | Fixed colour data |
$2133 | SETINI | Screen mode and interlace select |
$2134 | MPYL | Multiplication result, low (read) |
$2135 | MPYM | Multiplication result, middle (read) |
$2136 | MPYH | Multiplication result, high (read) |
$2137 | SLHV | Latch the horizontal and vertical counters (read) |
$2138 | OAMDATAREAD | OAM data read |
$2139 | VMDATALREAD | VRAM data read, low |
$213A | VMDATAHREAD | VRAM data read, high |
$213B | CGDATAREAD | Palette data read |
$213C | OPHCT | Horizontal counter latch |
$213D | OPVCT | Vertical counter latch |
$213E | STAT77 | PPU1 status |
$213F | STAT78 | PPU2 status |
Sound processor ports and work RAM access
| Address | Name | Meaning |
|---|---|---|
$2140 | APUIO0 | Sound processor port 0 |
$2141 | APUIO1 | Sound processor port 1 |
$2142 | APUIO2 | Sound processor port 2 |
$2143 | APUIO3 | Sound processor port 3 |
$2180 | WMDATA | Work RAM data |
$2181 | WMADDL | Work RAM address, low |
$2182 | WMADDM | Work RAM address, middle |
$2183 | WMADDH | Work RAM address, high |
The ports repeat every four bytes up to $217F; the explorer names only
$2140–$2143.
Joypad ports and CPU registers, $4016–$421F
| Address | Name | Meaning |
|---|---|---|
$4016 | JOYSER0 | Joypad serial port 1 (latch and read) |
$4017 | JOYSER1 | Joypad serial port 2 (read) |
$4200 | NMITIMEN | Interrupt enable: NMI, timer IRQs and auto joypad read |
$4201 | WRIO | Programmable I/O port (output) |
$4202 | WRMPYA | Multiplicand |
$4203 | WRMPYB | Multiplier, starts the multiplication |
$4204 | WRDIVL | Dividend, low |
$4205 | WRDIVH | Dividend, high |
$4206 | WRDIVB | Divisor, starts the division |
$4207 | HTIMEL | Horizontal timer, low |
$4208 | HTIMEH | Horizontal timer, high |
$4209 | VTIMEL | Vertical timer, low |
$420A | VTIMEH | Vertical timer, high |
$420B | MDMAEN | Start general DMA channels |
$420C | HDMAEN | Enable HDMA channels |
$420D | MEMSEL | ROM access speed |
$4210 | RDNMI | NMI flag and CPU version |
$4211 | TIMEUP | IRQ timer flag |
$4212 | HVBJOY | Blanking and auto joypad status |
$4213 | RDIO | Programmable I/O port (input) |
$4214 | RDDIVL | Quotient, low |
$4215 | RDDIVH | Quotient, high |
$4216 | RDMPYL | Product or remainder, low |
$4217 | RDMPYH | Product or remainder, high |
$4218 | JOY1L | Joypad 1 data, low |
$4219 | JOY1H | Joypad 1 data, high |
$421A | JOY2L | Joypad 2 data, low |
$421B | JOY2H | Joypad 2 data, high |
$421C | JOY3L | Joypad 3 data, low |
$421D | JOY3H | Joypad 3 data, high |
$421E | JOY4L | Joypad 4 data, low |
$421F | JOY4H | Joypad 4 data, high |
DMA channels, $4300–$437F
Channel n (0 to 7) has eleven registers at $43n0 to
$43nA. The explorer names them as the wiki does, with the channel number
in the name: $4310 is DMAP1, $4372 is A1T7L,
$4305 is DAS0L.
| Address | Name | Meaning |
|---|---|---|
$43n0 | DMAPn | DMA control: direction, mode, step |
$43n1 | BBADn | DMA destination register ($21xx) |
$43n2 | A1TnL | DMA source address, low |
$43n3 | A1TnH | DMA source address, high |
$43n4 | A1Bn | DMA source bank |
$43n5 | DASnL | DMA byte count (or HDMA indirect address), low |
$43n6 | DASnH | DMA byte count (or HDMA indirect address), high |
$43n7 | DASBn | HDMA indirect bank |
$43n8 | A2AnL | HDMA table address, low |
$43n9 | A2AnH | HDMA table address, high |
$43nA | NLTRn | HDMA reload flag and line counter |
Not described
Known, not yet covered
- Reference: the bits of each register: what each value does is on the sources below, not here.
- Reference: the register names of the co-processors (SA-1 at
$2200, Super FX at$3000, DSP-1, Cx4 and the rest) and the open-bus behaviour of the unused ranges. - Viewer: the disassembly does not know the data bank register, so a name on an absolute operand can be wrong when the data bank is not a system bank.
Links
Reference
- Registers – SNESdev Wiki: the register list with the bits